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ism-transceiver-915mhz/pcb/discrete/discrete-rf-board
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Kelvin Ly f6db9554c6 Save changes on old design and start work on redesign 2020-02-16 22:11:31 -05:00
..
discrete_footprints.pretty Footprint some stuff 2019-09-19 23:55:52 -04:00
pdfs Add matching PNP/NPN transistor pairs, fix pin numbering for BFU520R transistors TODO fix biasing on power stage, source last NPN transistor, autofill and start sourcing passives 2019-09-18 09:01:16 -04:00
.gitignore Finish active mixer simulation; it looks good! 2019-04-15 08:30:11 -04:00
README.md Start work on schematics 2019-04-13 09:20:46 -04:00
autofill_all.py Autofill; lots left to do 2019-09-19 08:35:47 -04:00
autofill_schem.py Autofill; lots left to do 2019-09-19 08:35:47 -04:00
dac.sch Save changes on old design and start work on redesign 2020-02-16 22:11:31 -05:00
dac.sch-bak Save changes on old design and start work on redesign 2020-02-16 22:11:31 -05:00
diode_mixer.bak Source hybrid quadrature coupler, add front end LC filter 2019-09-12 22:16:17 -04:00
diode_mixer.sch Save changes on old design and start work on redesign 2020-02-16 22:11:31 -05:00
diode_mixer.sch-bak Save changes on old design and start work on redesign 2020-02-16 22:11:31 -05:00
discrete-parts.bck Add matching PNP/NPN transistor pairs, fix pin numbering for BFU520R transistors TODO fix biasing on power stage, source last NPN transistor, autofill and start sourcing passives 2019-09-18 09:01:16 -04:00
discrete-parts.dcm Design DAC/ADC stages, pass out all control signals to top sheet 2019-09-13 08:21:37 -04:00
discrete-parts.lib Add matching PNP/NPN transistor pairs, fix pin numbering for BFU520R transistors TODO fix biasing on power stage, source last NPN transistor, autofill and start sourcing passives 2019-09-18 09:01:16 -04:00
discrete-rf-board-cache.lib Save changes on old design and start work on redesign 2020-02-16 22:11:31 -05:00
discrete-rf-board.bak Source hybrid quadrature coupler, add front end LC filter 2019-09-12 22:16:17 -04:00
discrete-rf-board.kicad_pcb Start work on schematics 2019-04-13 09:20:46 -04:00
discrete-rf-board.kicad_pcb-bak Start work on schematics 2019-04-13 09:20:46 -04:00
discrete-rf-board.pro Wire out all control signals to connectors TODO PLL charge pump loop, bypass caps in attenuator circuit, antialiasing filter for ADC frontend 2019-09-16 08:36:57 -04:00
discrete-rf-board.sch Save changes on old design and start work on redesign 2020-02-16 22:11:31 -05:00
discrete-rf-board.sch-bak Save changes on old design and start work on redesign 2020-02-16 22:11:31 -05:00
fp-info-cache Add matching PNP/NPN transistor pairs, fix pin numbering for BFU520R transistors TODO fix biasing on power stage, source last NPN transistor, autofill and start sourcing passives 2019-09-18 09:01:16 -04:00
fp-lib-table Start work in footprinting everything 2019-09-17 09:02:27 -04:00
gen_analog_cp24_14.py Start work in footprinting everything 2019-09-17 09:02:27 -04:00
gen_analog_dfn8ep.py The footprintening continues 2019-09-17 23:23:31 -04:00
gen_infineon_tslp-6-4.py Start work in footprinting everything 2019-09-17 09:02:27 -04:00
gen_maxim_tqfn28ep.py Footprint some stuff 2019-09-19 23:55:52 -04:00
if_amp.bak Source hybrid quadrature coupler, add front end LC filter 2019-09-12 22:16:17 -04:00
if_amp.sch Save changes on old design and start work on redesign 2020-02-16 22:11:31 -05:00
if_amp.sch-bak Save changes on old design and start work on redesign 2020-02-16 22:11:31 -05:00
lna.bak Merge stuff I guess, hopefully this doesn't break too much 2019-07-05 21:38:34 -04:00
lna.sch Save changes on old design and start work on redesign 2020-02-16 22:11:31 -05:00
lna.sch-bak Save changes on old design and start work on redesign 2020-02-16 22:11:31 -05:00
lna_gain_block.bak Source hybrid quadrature coupler, add front end LC filter 2019-09-12 22:16:17 -04:00
lna_gain_block.sch Save changes on old design and start work on redesign 2020-02-16 22:11:31 -05:00
lna_gain_block.sch-bak Save changes on old design and start work on redesign 2020-02-16 22:11:31 -05:00
lo.bak Merge stuff I guess, hopefully this doesn't break too much 2019-07-05 21:38:34 -04:00
lo.sch Save changes on old design and start work on redesign 2020-02-16 22:11:31 -05:00
lo.sch-bak Save changes on old design and start work on redesign 2020-02-16 22:11:31 -05:00
mixer.bak Source hybrid quadrature coupler, add front end LC filter 2019-09-12 22:16:17 -04:00
mixer.sch Save changes on old design and start work on redesign 2020-02-16 22:11:31 -05:00
mixer.sch-bak Save changes on old design and start work on redesign 2020-02-16 22:11:31 -05:00
pa.sch Save changes on old design and start work on redesign 2020-02-16 22:11:31 -05:00
pa.sch-bak Save changes on old design and start work on redesign 2020-02-16 22:11:31 -05:00
receiver.bak Source hybrid quadrature coupler, add front end LC filter 2019-09-12 22:16:17 -04:00
receiver.sch Save changes on old design and start work on redesign 2020-02-16 22:11:31 -05:00
receiver.sch-bak Save changes on old design and start work on redesign 2020-02-16 22:11:31 -05:00
switchable-attenuator.bak Source hybrid quadrature coupler, add front end LC filter 2019-09-12 22:16:17 -04:00
switchable-attenuator.sch Save changes on old design and start work on redesign 2020-02-16 22:11:31 -05:00
switchable-attenuator.sch-bak Save changes on old design and start work on redesign 2020-02-16 22:11:31 -05:00
sym-lib-table Fix symbol tables I guess 2019-06-19 10:49:32 -04:00
transmitter.bak Merge stuff I guess, hopefully this doesn't break too much 2019-07-05 21:38:34 -04:00
transmitter.sch Save changes on old design and start work on redesign 2020-02-16 22:11:31 -05:00
transmitter.sch-bak Save changes on old design and start work on redesign 2020-02-16 22:11:31 -05:00

README.md

OSH Park-compatible 2 Layer KiCad Template

This is a KiCad template to simplify making printed circuit boards.

It comes with all the design rules to meet the 2-layer OSH Park specs and stackup.

Instructions

  1. Open KiCad.
  2. Open Preferences > Configure Paths and note the value of 'KICAD_PTEMPLATES'.
  3. In KiCad, open File > New Project > New Project from Template.
  4. Select the location of your new project. The name of the folder will be the name of your project.
  5. The templates with folders in the 'KICAD_PTEMPLATES' are listed under 'Portable Templates" tab.
  6. Select the template and click 'OK'.
  7. Your project now exists, so you can open EESchema and PCBNew and design as usual.