diff --git a/pcb/discrete/discrete-rf-board/README.md b/pcb/discrete/discrete-rf-board/README.md
new file mode 100644
index 0000000..6131733
--- /dev/null
+++ b/pcb/discrete/discrete-rf-board/README.md
@@ -0,0 +1,19 @@
+# OSH Park-compatible 2 Layer KiCad Template
+
+This is a KiCad template to simplify making printed circuit boards.  
+
+It comes with all the design rules to meet the 2-layer OSH Park specs and stackup. 
+
+- <a href="http://docs.oshpark.com/services/two-layer/">OSH Park Two Layer Specs</a>
+- <a href="http://docs.oshpark.com/design-tools/kicad">OSH Park KiCad help</a>
+
+### Instructions
+
+1. Open KiCad.
+1. Open Preferences > Configure Paths and note the value of 'KICAD_PTEMPLATES'.
+1. In KiCad, open File > New Project > New Project from Template.
+1. Select the location of your new project. The name of the folder will be the name of your project.
+1. The templates with folders in the 'KICAD_PTEMPLATES' are listed under 'Portable Templates" tab.
+1. Select the template and click 'OK'.
+1. Your project now exists, so you can open EESchema and PCBNew and design as usual.
+
diff --git a/pcb/discrete/discrete-rf-board/discrete-parts.bck b/pcb/discrete/discrete-rf-board/discrete-parts.bck
new file mode 100644
index 0000000..924c554
--- /dev/null
+++ b/pcb/discrete/discrete-rf-board/discrete-parts.bck
@@ -0,0 +1,11 @@
+EESchema-DOCLIB  Version 2.0
+#
+$CMP ADF4360-7BCPZRL7
+D Phase Locked Loops - PLL Intg Integer-N VCO Out Freq 350-1800
+$ENDCMP
+#
+$CMP HHM17147A1
+D Signal Conditioning Multilyer Balun 673-2700MHz 100 ohms
+$ENDCMP
+#
+#End Doc Library
diff --git a/pcb/discrete/discrete-rf-board/discrete-parts.dcm b/pcb/discrete/discrete-rf-board/discrete-parts.dcm
new file mode 100644
index 0000000..924c554
--- /dev/null
+++ b/pcb/discrete/discrete-rf-board/discrete-parts.dcm
@@ -0,0 +1,11 @@
+EESchema-DOCLIB  Version 2.0
+#
+$CMP ADF4360-7BCPZRL7
+D Phase Locked Loops - PLL Intg Integer-N VCO Out Freq 350-1800
+$ENDCMP
+#
+$CMP HHM17147A1
+D Signal Conditioning Multilyer Balun 673-2700MHz 100 ohms
+$ENDCMP
+#
+#End Doc Library
diff --git a/pcb/discrete/discrete-rf-board/discrete-parts.lib b/pcb/discrete/discrete-rf-board/discrete-parts.lib
new file mode 100644
index 0000000..7c477dc
--- /dev/null
+++ b/pcb/discrete/discrete-rf-board/discrete-parts.lib
@@ -0,0 +1,92 @@
+EESchema-LIBRARY Version 2.4
+#encoding utf-8
+#
+# ADF4360-7BCPZRL7
+#
+DEF ADF4360-7BCPZRL7 U 0 40 Y Y 1 F N
+F0 "U" 0 450 50 H V C CNN
+F1 "ADF4360-7BCPZRL7" 0 300 50 H V C CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+ALIAS ADF4360-7BCPZ ADF4360-7BCPZRL
+DRAW
+S -700 400 700 -1300 0 1 0 f
+X CPGND 1 550 -1400 100 U 50 50 1 1 P
+X L2 10 -800 -800 100 R 50 50 1 1 P
+X AGND 11 100 -1400 100 U 50 50 1 1 P
+X CC 12 -800 -900 100 R 50 50 1 1 P
+X RSET 13 -800 -1000 100 R 50 50 1 1 P
+X CN 14 -800 -1100 100 R 50 50 1 1 P
+X DGND 15 -300 -1400 100 U 50 50 1 1 P
+X REFIN 16 -800 100 100 R 50 50 1 1 I
+X CLK 17 -800 -50 100 R 50 50 1 1 I
+X DATA 18 -800 -150 100 R 50 50 1 1 I
+X LE 19 -800 -250 100 R 50 50 1 1 I
+X AVDD 2 800 250 100 L 50 50 1 1 W
+X MUXOUT 20 -800 -400 100 R 50 50 1 1 O
+X DVDD 21 -800 250 100 R 50 50 1 1 W
+X AGND 22 200 -1400 100 U 50 50 1 1 P
+X CE 23 -800 -550 100 R 50 50 1 1 I
+X AGND 3 -100 -1400 100 U 50 50 1 1 P
+X RFOUTA 4 800 100 100 L 50 50 1 1 O
+X RFOUTB 5 800 0 100 L 50 50 1 1 O
+X VVCO 6 800 -300 100 L 50 50 1 1 W
+X VTUNE 7 800 -400 100 L 50 50 1 1 I
+X AGND 8 0 -1400 100 U 50 50 1 1 P
+X L1 9 -800 -700 100 R 50 50 1 1 P
+X 24 CP 800 -850 100 L 50 50 1 1 O
+X 25 EP 400 -1400 100 U 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# HHM17147A1
+#
+DEF HHM17147A1 U 0 40 Y N 1 F N
+F0 "U" 0 0 50 H V C CNN
+F1 "HHM17147A1" 0 -500 50 H V C CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+DRAW
+A -50 -375 25 -899 899 0 1 0 N -50 -400 -50 -350
+A -50 -325 25 -899 899 0 1 0 N -50 -350 -50 -300
+A -50 -275 25 -899 899 0 1 0 N -50 -300 -50 -250
+A -50 -225 25 -899 899 0 1 0 N -50 -250 -50 -200
+A -50 -175 25 -899 899 0 1 0 N -50 -200 -50 -150
+A -50 -125 25 -899 899 0 1 0 N -50 -150 -50 -100
+A 50 -375 25 901 -901 0 1 0 N 50 -350 50 -400
+A 50 -325 25 901 -901 0 1 0 N 50 -300 50 -350
+A 50 -275 25 901 -901 0 1 0 N 50 -250 50 -300
+A 50 -225 25 901 -901 0 1 0 N 50 -200 50 -250
+A 50 -175 25 901 -901 0 1 0 N 50 -150 50 -200
+A 50 -125 25 901 -901 0 1 0 N 50 -100 50 -150
+X SINGLE 1 150 -100 100 L 50 50 1 1 P
+X COMMON 2 -150 -250 100 R 50 50 1 1 P
+X + 3 -150 -100 100 R 50 50 1 1 P
+X - 4 -150 -400 100 R 50 50 1 1 P
+X GND 5 150 -400 100 L 50 50 1 1 P
+X NC 6 150 -250 100 L 50 50 1 1 N N
+ENDDRAW
+ENDDEF
+#
+# Q_NPN_BCEE
+#
+DEF Q_NPN_BCEE Q 0 40 Y N 1 F N
+F0 "Q" 300 0 50 H V C CNN
+F1 "Q_NPN_BCEE" 200 -100 50 H V L CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+DRAW
+C 0 0 111 1 1 10 N
+P 2 1 1 0 -25 25 50 100 N
+P 2 1 1 0 50 -100 150 -100 N
+P 3 1 1 0 -25 -25 50 -100 50 -100 N
+P 3 1 1 20 -25 75 -25 -75 -25 -75 N
+P 5 1 1 0 0 -70 20 -50 40 -90 0 -70 0 -70 F
+X B 1 -250 0 225 R 50 50 1 1 I
+X C 2 50 200 100 D 50 50 1 1 P
+X E 3 50 -200 100 U 50 50 1 1 P
+X C 4 150 -200 100 U 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/pcb/discrete/discrete-rf-board/discrete-rf-board-cache.lib b/pcb/discrete/discrete-rf-board/discrete-rf-board-cache.lib
new file mode 100644
index 0000000..7f20299
--- /dev/null
+++ b/pcb/discrete/discrete-rf-board/discrete-rf-board-cache.lib
@@ -0,0 +1,188 @@
+EESchema-LIBRARY Version 2.4
+#encoding utf-8
+#
+# Connector_Conn_Coaxial
+#
+DEF Connector_Conn_Coaxial J 0 40 Y N 1 F N
+F0 "J" 10 120 50 H V C CNN
+F1 "Connector_Conn_Coaxial" 115 0 50 V V C CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+$FPLIST
+ *BNC*
+ *SMA*
+ *SMB*
+ *SMC*
+ *Cinch*
+$ENDFPLIST
+DRAW
+A -2 0 71 1636 0 0 1 10 N -70 20 70 0
+A -1 0 71 0 -1638 0 1 10 N 70 0 -70 -20
+C 0 0 20 0 1 8 N
+P 2 0 1 0 -100 0 -20 0 N
+P 2 0 1 0 0 -100 0 -70 N
+X In 1 -200 0 100 R 50 50 1 1 P
+X Ext 2 0 -200 100 U 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# Device_C_Small
+#
+DEF Device_C_Small C 0 10 N N 1 F N
+F0 "C" 10 70 50 H V L CNN
+F1 "Device_C_Small" 10 -80 50 H V L CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+$FPLIST
+ C_*
+$ENDFPLIST
+DRAW
+P 2 0 1 13 -60 -20 60 -20 N
+P 2 0 1 12 -60 20 60 20 N
+X ~ 1 0 100 80 D 50 50 1 1 P
+X ~ 2 0 -100 80 U 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# Device_L_Small
+#
+DEF Device_L_Small L 0 10 N N 1 F N
+F0 "L" 30 40 50 H V L CNN
+F1 "Device_L_Small" 30 -40 50 H V L CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+$FPLIST
+ Choke_*
+ *Coil*
+ Inductor_*
+ L_*
+$ENDFPLIST
+DRAW
+A 0 -60 20 -899 899 0 1 0 N 0 -80 0 -40
+A 0 -20 20 -899 899 0 1 0 N 0 -40 0 0
+A 0 20 20 -899 899 0 1 0 N 0 0 0 40
+A 0 60 20 -899 899 0 1 0 N 0 40 0 80
+X ~ 1 0 100 20 D 50 50 1 1 P
+X ~ 2 0 -100 20 U 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# Device_R_Small
+#
+DEF Device_R_Small R 0 10 N N 1 F N
+F0 "R" 30 20 50 H V L CNN
+F1 "Device_R_Small" 30 -40 50 H V L CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+$FPLIST
+ R_*
+$ENDFPLIST
+DRAW
+S -30 70 30 -70 0 1 8 N
+X ~ 1 0 100 30 D 50 50 1 1 P
+X ~ 2 0 -100 30 U 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# discrete-parts_ADF4360-7BCPZRL7
+#
+DEF discrete-parts_ADF4360-7BCPZRL7 U 0 40 Y Y 1 F N
+F0 "U" 0 450 50 H V C CNN
+F1 "discrete-parts_ADF4360-7BCPZRL7" 0 300 50 H V C CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+ALIAS ADF4360-7BCPZ ADF4360-7BCPZRL
+DRAW
+S -700 400 700 -1300 0 1 0 f
+X CPGND 1 550 -1400 100 U 50 50 1 1 P
+X L2 10 -800 -800 100 R 50 50 1 1 P
+X AGND 11 100 -1400 100 U 50 50 1 1 P
+X CC 12 -800 -900 100 R 50 50 1 1 P
+X RSET 13 -800 -1000 100 R 50 50 1 1 P
+X CN 14 -800 -1100 100 R 50 50 1 1 P
+X DGND 15 -300 -1400 100 U 50 50 1 1 P
+X REFIN 16 -800 100 100 R 50 50 1 1 I
+X CLK 17 -800 -50 100 R 50 50 1 1 I
+X DATA 18 -800 -150 100 R 50 50 1 1 I
+X LE 19 -800 -250 100 R 50 50 1 1 I
+X AVDD 2 800 250 100 L 50 50 1 1 W
+X MUXOUT 20 -800 -400 100 R 50 50 1 1 O
+X DVDD 21 -800 250 100 R 50 50 1 1 W
+X AGND 22 200 -1400 100 U 50 50 1 1 P
+X CE 23 -800 -550 100 R 50 50 1 1 I
+X AGND 3 -100 -1400 100 U 50 50 1 1 P
+X RFOUTA 4 800 100 100 L 50 50 1 1 O
+X RFOUTB 5 800 0 100 L 50 50 1 1 O
+X VVCO 6 800 -300 100 L 50 50 1 1 W
+X VTUNE 7 800 -400 100 L 50 50 1 1 I
+X AGND 8 0 -1400 100 U 50 50 1 1 P
+X L1 9 -800 -700 100 R 50 50 1 1 P
+X 24 CP 800 -850 100 L 50 50 1 1 O
+X 25 EP 400 -1400 100 U 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# discrete-parts_HHM17147A1
+#
+DEF discrete-parts_HHM17147A1 U 0 40 Y N 1 F N
+F0 "U" 0 0 50 H V C CNN
+F1 "discrete-parts_HHM17147A1" 0 -500 50 H V C CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+DRAW
+A -50 -375 25 -899 899 0 1 0 N -50 -400 -50 -350
+A -50 -325 25 -899 899 0 1 0 N -50 -350 -50 -300
+A -50 -275 25 -899 899 0 1 0 N -50 -300 -50 -250
+A -50 -225 25 -899 899 0 1 0 N -50 -250 -50 -200
+A -50 -175 25 -899 899 0 1 0 N -50 -200 -50 -150
+A -50 -125 25 -899 899 0 1 0 N -50 -150 -50 -100
+A 50 -375 25 901 -901 0 1 0 N 50 -350 50 -400
+A 50 -325 25 901 -901 0 1 0 N 50 -300 50 -350
+A 50 -275 25 901 -901 0 1 0 N 50 -250 50 -300
+A 50 -225 25 901 -901 0 1 0 N 50 -200 50 -250
+A 50 -175 25 901 -901 0 1 0 N 50 -150 50 -200
+A 50 -125 25 901 -901 0 1 0 N 50 -100 50 -150
+X SINGLE 1 150 -100 100 L 50 50 1 1 P
+X COMMON 2 -150 -250 100 R 50 50 1 1 P
+X + 3 -150 -100 100 R 50 50 1 1 P
+X - 4 -150 -400 100 R 50 50 1 1 P
+X GND 5 150 -400 100 L 50 50 1 1 P
+X NC 6 150 -250 100 L 50 50 1 1 N N
+ENDDRAW
+ENDDEF
+#
+# discrete-parts_Q_NPN_BCEE
+#
+DEF discrete-parts_Q_NPN_BCEE Q 0 40 Y N 1 F N
+F0 "Q" 300 0 50 H V C CNN
+F1 "discrete-parts_Q_NPN_BCEE" 200 -100 50 H V L CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+DRAW
+C 0 0 111 1 1 10 N
+P 2 1 1 0 -25 25 50 100 N
+P 2 1 1 0 50 -100 150 -100 N
+P 3 1 1 0 -25 -25 50 -100 50 -100 N
+P 3 1 1 20 -25 75 -25 -75 -25 -75 N
+P 5 1 1 0 0 -70 20 -50 40 -90 0 -70 0 -70 F
+X B 1 -250 0 225 R 50 50 1 1 I
+X C 2 50 200 100 D 50 50 1 1 P
+X E 3 50 -200 100 U 50 50 1 1 P
+X C 4 150 -200 100 U 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# power_GND
+#
+DEF power_GND #PWR 0 0 Y Y 1 F P
+F0 "#PWR" 0 -250 50 H I C CNN
+F1 "power_GND" 0 -150 50 H V C CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+DRAW
+P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
+X GND 1 0 0 0 D 50 50 1 1 W N
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/pcb/discrete/discrete-rf-board/discrete-rf-board.bak b/pcb/discrete/discrete-rf-board/discrete-rf-board.bak
new file mode 100644
index 0000000..d9e2dc3
--- /dev/null
+++ b/pcb/discrete/discrete-rf-board/discrete-rf-board.bak
@@ -0,0 +1,35 @@
+EESchema Schematic File Version 4
+LIBS:discrete-rf-board-cache
+EELAYER 26 0
+EELAYER END
+$Descr USLetter 11000 8500
+encoding utf-8
+Sheet 1 4
+Title ""
+Date ""
+Rev ""
+Comp ""
+Comment1 ""
+Comment2 ""
+Comment3 ""
+Comment4 ""
+$EndDescr
+$Sheet
+S 1825 2725 1775 1550
+U 5CA6B046
+F0 "Local Oscillator" 50
+F1 "lo.sch" 50
+$EndSheet
+$Sheet
+S 5050 1550 1500 1350
+U 5CA6B0AA
+F0 "Receiver" 50
+F1 "receiver.sch" 50
+$EndSheet
+$Sheet
+S 5100 3650 1700 1550
+U 5CA6B0B3
+F0 "Transmitter" 50
+F1 "transmitter.sch" 50
+$EndSheet
+$EndSCHEMATC
diff --git a/pcb/discrete/discrete-rf-board/discrete-rf-board.kicad_pcb b/pcb/discrete/discrete-rf-board/discrete-rf-board.kicad_pcb
new file mode 100644
index 0000000..d1ed45b
--- /dev/null
+++ b/pcb/discrete/discrete-rf-board/discrete-rf-board.kicad_pcb
@@ -0,0 +1,116 @@
+(kicad_pcb (version 20171130) (host pcbnew 5.0.0)
+
+  (general
+    (thickness 1.6)
+    (drawings 1)
+    (tracks 0)
+    (zones 0)
+    (modules 0)
+    (nets 1)
+  )
+
+  (page USLetter)
+  (title_block
+    (title "Project Title")
+  )
+
+  (layers
+    (0 F.Cu signal)
+    (31 B.Cu signal)
+    (34 B.Paste user)
+    (35 F.Paste user)
+    (36 B.SilkS user)
+    (37 F.SilkS user)
+    (38 B.Mask user)
+    (39 F.Mask user)
+    (40 Dwgs.User user)
+    (44 Edge.Cuts user)
+    (46 B.CrtYd user)
+    (47 F.CrtYd user)
+    (48 B.Fab user)
+    (49 F.Fab user)
+  )
+
+  (setup
+    (last_trace_width 0.1524)
+    (user_trace_width 0.1524)
+    (user_trace_width 0.254)
+    (user_trace_width 0.3302)
+    (user_trace_width 0.508)
+    (user_trace_width 0.762)
+    (user_trace_width 1.27)
+    (trace_clearance 0.1524)
+    (zone_clearance 0.508)
+    (zone_45_only no)
+    (trace_min 0.1524)
+    (segment_width 0.1524)
+    (edge_width 0.1524)
+    (via_size 0.6858)
+    (via_drill 0.3302)
+    (via_min_size 0.6858)
+    (via_min_drill 0.3302)
+    (user_via 0.6858 0.3302)
+    (user_via 0.762 0.4064)
+    (user_via 0.8636 0.508)
+    (uvia_size 0.6858)
+    (uvia_drill 0.3302)
+    (uvias_allowed no)
+    (uvia_min_size 0)
+    (uvia_min_drill 0)
+    (pcb_text_width 0.1524)
+    (pcb_text_size 1.016 1.016)
+    (mod_edge_width 0.1524)
+    (mod_text_size 1.016 1.016)
+    (mod_text_width 0.1524)
+    (pad_size 1.524 1.524)
+    (pad_drill 0.762)
+    (pad_to_mask_clearance 0.0508)
+    (solder_mask_min_width 0.1016)
+    (pad_to_paste_clearance -0.0762)
+    (aux_axis_origin 0 0)
+    (visible_elements FFFEDF7D)
+    (pcbplotparams
+      (layerselection 0x310fc_80000001)
+      (usegerberextensions true)
+      (usegerberattributes false)
+      (usegerberadvancedattributes false)
+      (creategerberjobfile false)
+      (excludeedgelayer true)
+      (linewidth 0.100000)
+      (plotframeref false)
+      (viasonmask false)
+      (mode 1)
+      (useauxorigin false)
+      (hpglpennumber 1)
+      (hpglpenspeed 20)
+      (hpglpendiameter 15.000000)
+      (psnegative false)
+      (psa4output false)
+      (plotreference true)
+      (plotvalue true)
+      (plotinvisibletext false)
+      (padsonsilk false)
+      (subtractmaskfromsilk false)
+      (outputformat 1)
+      (mirror false)
+      (drillshape 0)
+      (scaleselection 1)
+      (outputdirectory "gerbers"))
+  )
+
+  (net 0 "")
+
+  (net_class Default "This is the default net class."
+    (clearance 0.1524)
+    (trace_width 0.1524)
+    (via_dia 0.6858)
+    (via_drill 0.3302)
+    (uvia_dia 0.6858)
+    (uvia_drill 0.3302)
+  )
+
+  (gr_text "FABRICATION NOTES\n\n1. THIS IS A 2 LAYER BOARD. \n2. EXTERNAL LAYERS SHALL HAVE 1 OZ COPPER.\n3. MATERIAL: FR4 AND 0.062 INCH +/- 10% THICK.\n4. MANUFACTURE IN ACCORDANCE WITH IPC-6012 CLASS 2\n5. ROHS COMPLIANCE IS NOT REQUIRED.\n6. MASK: BOTH SIDES OF THE BOARD SHALL HAVE \n   SOLDER MASK (ANY COLOR) OVER BARE COPPER. \n7. SILK: BOTH SIDES OF THE BOARD SHALL HAVE \n   WHITE SILKSCREEN. DO NOT PLACE SILK OVER BARE COPPER.\n8. FINISH: HASL/ENIG.\n9. MINIMUM TRACE WIDTH - 0.006 INCH.\n   MINIMUM SPACE - 0.006 INCH.\n   MINIMUM HOLE DIA - 0.013 INCH. \n10. MAX HOLE PLACEMENT TOLERANCE OF +/- 0.003 INCH.\n11. MAX HOLE DIAMETER TOLERANCE OF +/- 0.003 INCH AFTER PLATING." (at 113.4872 93.2688) (layer Dwgs.User)
+    (effects (font (size 2.54 2.54) (thickness 0.254)) (justify left))
+  )
+
+)
diff --git a/pcb/discrete/discrete-rf-board/discrete-rf-board.kicad_pcb-bak b/pcb/discrete/discrete-rf-board/discrete-rf-board.kicad_pcb-bak
new file mode 100644
index 0000000..79b3eab
--- /dev/null
+++ b/pcb/discrete/discrete-rf-board/discrete-rf-board.kicad_pcb-bak
@@ -0,0 +1,116 @@
+(kicad_pcb (version 20171130) (host pcbnew 5.0.0)
+
+  (general
+    (thickness 1.6)
+    (drawings 1)
+    (tracks 0)
+    (zones 0)
+    (modules 0)
+    (nets 1)
+  )
+
+  (page USLetter)
+  (title_block
+    (title "Project Title")
+  )
+
+  (layers
+    (0 F.Cu signal)
+    (31 B.Cu signal)
+    (34 B.Paste user)
+    (35 F.Paste user)
+    (36 B.SilkS user)
+    (37 F.SilkS user)
+    (38 B.Mask user)
+    (39 F.Mask user)
+    (40 Dwgs.User user)
+    (44 Edge.Cuts user)
+    (46 B.CrtYd user)
+    (47 F.CrtYd user)
+    (48 B.Fab user)
+    (49 F.Fab user)
+  )
+
+  (setup
+    (last_trace_width 0.1524)
+    (user_trace_width 0.1524)
+    (user_trace_width 0.254)
+    (user_trace_width 0.3302)
+    (user_trace_width 0.508)
+    (user_trace_width 0.762)
+    (user_trace_width 1.27)
+    (trace_clearance 0.1524)
+    (zone_clearance 0.508)
+    (zone_45_only no)
+    (trace_min 0.1524)
+    (segment_width 0.1524)
+    (edge_width 0.1524)
+    (via_size 0.6858)
+    (via_drill 0.3302)
+    (via_min_size 0.6858)
+    (via_min_drill 0.3302)
+    (user_via 0.6858 0.3302)
+    (user_via 0.762 0.4064)
+    (user_via 0.8636 0.508)
+    (uvia_size 0.6858)
+    (uvia_drill 0.3302)
+    (uvias_allowed no)
+    (uvia_min_size 0)
+    (uvia_min_drill 0)
+    (pcb_text_width 0.1524)
+    (pcb_text_size 1.016 1.016)
+    (mod_edge_width 0.1524)
+    (mod_text_size 1.016 1.016)
+    (mod_text_width 0.1524)
+    (pad_size 1.524 1.524)
+    (pad_drill 0.762)
+    (pad_to_mask_clearance 0.0508)
+    (solder_mask_min_width 0.1016)
+    (pad_to_paste_clearance -0.0762)
+    (aux_axis_origin 0 0)
+    (visible_elements FFFEDF7D)
+    (pcbplotparams
+      (layerselection 0x310fc_80000001)
+      (usegerberextensions true)
+      (usegerberattributes false)
+      (usegerberadvancedattributes false)
+      (creategerberjobfile false)
+      (excludeedgelayer true)
+      (linewidth 0.100000)
+      (plotframeref false)
+      (viasonmask false)
+      (mode 1)
+      (useauxorigin false)
+      (hpglpennumber 1)
+      (hpglpenspeed 20)
+      (hpglpendiameter 15.000000)
+      (psnegative false)
+      (psa4output false)
+      (plotreference true)
+      (plotvalue true)
+      (plotinvisibletext false)
+      (padsonsilk false)
+      (subtractmaskfromsilk false)
+      (outputformat 1)
+      (mirror false)
+      (drillshape 0)
+      (scaleselection 1)
+      (outputdirectory "gerbers"))
+  )
+
+  (net 0 "")
+
+  (net_class Default "This is the default net class."
+    (clearance 0.1524)
+    (trace_width 0.1524)
+    (via_dia 0.6858)
+    (via_drill 0.3302)
+    (uvia_dia 0.6858)
+    (uvia_drill 0.3302)
+  )
+
+  (gr_text "FABRICATION NOTES\n\n1. THIS IS A 2 LAYER BOARD. \n2. EXTERNAL LAYERS SHALL HAVE 1 OZ COPPER.\n3. MATERIAL: FR4 AND 0.062 INCH +/- 10% THICK.\n4. MANUFACTURE IN ACCORDANCE WITH IPC-6012 CLASS 2\n5. MASK: BOTH SIDES OF THE BOARD SHALL HAVE \n   SOLDER MASK (ANY COLOR) OVER BARE COPPER. \n6. SILK: BOTH SIDES OF THE BOARD SHALL HAVE \n   WHITE SILKSCREEN. DO NOT PLACE SILK OVER BARE COPPER.\n7. FINISH: HASL/ENIG.\n8. MINIMUM TRACE WIDTH - 0.006 INCH.\n   MINIMUM SPACE - 0.006 INCH.\n   MINIMUM HOLE DIA - 0.013 INCH. \n10. MAX HOLE PLACEMENT TOLERANCE OF +/- 0.003 INCH.\n11. MAX HOLE DIAMETER TOLERANCE OF +/- 0.003 INCH AFTER PLATING." (at 113.4872 93.2688) (layer Dwgs.User)
+    (effects (font (size 2.54 2.54) (thickness 0.254)) (justify left))
+  )
+
+)
diff --git a/pcb/discrete/discrete-rf-board/discrete-rf-board.pro b/pcb/discrete/discrete-rf-board/discrete-rf-board.pro
new file mode 100644
index 0000000..ff5741b
--- /dev/null
+++ b/pcb/discrete/discrete-rf-board/discrete-rf-board.pro
@@ -0,0 +1,41 @@
+update=Tue 11 Oct 2016 05:25:07 PM PDT
+version=1
+last_client=kicad
+[cvpcb]
+version=1
+NetIExt=net
+[pcbnew]
+version=1
+PageLayoutDescrFile=
+LastNetListRead=
+PadDrill=0.600000000000
+PadDrillOvalY=0.600000000000
+PadSizeH=1.500000000000
+PadSizeV=1.500000000000
+PcbTextSizeV=1.016000000000
+PcbTextSizeH=1.016000000000
+PcbTextThickness=0.152400000000
+ModuleTextSizeV=1.016000000000
+ModuleTextSizeH=1.016000000000
+ModuleTextSizeThickness=0.152400000000
+SolderMaskClearance=0.003000000000
+SolderMaskMinWidth=0.004000000000
+DrawSegmentWidth=0.152400000000
+BoardOutlineThickness=0.152400000000
+ModuleOutlineThickness=0.152400000000
+[eeschema]
+version=1
+LibDir=
+[eeschema/libraries]
+[schematic_editor]
+version=1
+PageLayoutDescrFile=
+PlotDirectoryName=
+SubpartIdSeparator=0
+SubpartFirstId=65
+NetFmtName=
+SpiceForceRefPrefix=0
+SpiceUseNetNumbers=0
+LabSize=50
+[general]
+version=1
diff --git a/pcb/discrete/discrete-rf-board/discrete-rf-board.sch b/pcb/discrete/discrete-rf-board/discrete-rf-board.sch
new file mode 100644
index 0000000..d9e2dc3
--- /dev/null
+++ b/pcb/discrete/discrete-rf-board/discrete-rf-board.sch
@@ -0,0 +1,35 @@
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+EELAYER 26 0
+EELAYER END
+$Descr USLetter 11000 8500
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new file mode 100644
index 0000000..96f9303
--- /dev/null
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+F 3 "" H 2700 4700 50  0001 C CNN
+	1    2700 4700
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+$EndComp
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+L power:GND #PWR?
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+F 3 "" H 1550 4700 50  0001 C CNN
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+F 0 "Q?" H 9500 4150 50  0000 C CNN
+F 1 "BFU520" H 9400 4050 50  0000 L CNN
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+F 3 "" H 9200 4150 50  0001 C CNN
+F 4 "771-BFU520XRR" H 9200 4150 50  0001 C CNN "Mouser"
+	1    9200 4150
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+Text Notes 7100 4700 0    50   ~ 0
+IL=-0.7dB
+Text HLabel 10350 3550 2    50   Input ~ 0
+LO
+$Comp
+L power:GND #PWR?
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+F 0 "#PWR?" H 9250 4200 50  0001 C CNN
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+F 2 "" H 9250 4450 50  0001 C CNN
+F 3 "" H 9250 4450 50  0001 C CNN
+	1    9250 4450
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+$EndComp
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+Wire Wire Line
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+F 0 "J?" H 7860 3720 50  0000 C CNN
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+F 2 "" H 7850 3600 50  0001 C CNN
+F 3 " ~" H 7850 3600 50  0001 C CNN
+	1    7850 3600
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+$EndComp
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+F 3 "" H 7850 3850 50  0001 C CNN
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+Wire Wire Line
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+L Connector:Conn_Coaxial J?
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+F 2 "" H 10100 3850 50  0001 C CNN
+F 3 " ~" H 10100 3850 50  0001 C CNN
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+F 3 "" H 10100 4100 50  0001 C CNN
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+Text Notes 6250 4650 0    50   ~ 0
+-3 to +5dBm?\ndatasheet is unclear
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+F 3 "~" H 8400 4150 50  0001 C CNN
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+F 0 "R?" H 8180 4420 50  0000 L CNN
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+F 3 "~" H 8150 4400 50  0001 C CNN
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+F 2 "" H 8150 4600 50  0001 C CNN
+F 3 "" H 8150 4600 50  0001 C CNN
+	1    8150 4600
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+L Device:L_Small L?
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+F 2 "" H 8600 4400 50  0001 C CNN
+F 3 "~" H 8600 4400 50  0001 C CNN
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+F 0 "C?" H 8760 4220 50  0000 L CNN
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+Wire Wire Line
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+F 0 "C?" H 9410 3920 50  0000 L CNN
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+L power:GND #PWR?
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+F 3 "" H 9750 4500 50  0001 C CNN
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+	1    9250 3400
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+$EndComp
+Wire Wire Line
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+$Comp
+L Device:R_Small R?
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+F 2 "" H 9250 3000 50  0001 C CNN
+F 3 "~" H 9250 3000 50  0001 C CNN
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+$Comp
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+F 3 "" H 9950 3100 50  0001 C CNN
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+$Comp
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+F 3 "" H 10350 3100 50  0001 C CNN
+	1    10350 3100
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+Wire Wire Line
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+Connection ~ 9250 3200
+$Comp
+L Device:R_Small R?
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+F 0 "R?" H 8930 3220 50  0000 L CNN
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+F 3 "" H 8450 3450 50  0001 C CNN
+	1    8450 3450
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+Wire Wire Line
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+Wire Wire Line
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+Text Notes 9100 4750 0    50   ~ 0
+~~10 dB gain
+Text Notes 8550 2300 0    50   ~ 0
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+Text Label 9250 2700 0    50   ~ 0
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+Text Notes 9400 2500 0    50   ~ 0
+10 mA bias current
+Text Notes 9400 4950 0    50   ~ 0
+Compression point should at ~~4dBm
+Text HLabel 9250 2600 1    50   Input ~ 0
++5V0
+Wire Wire Line
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diff --git a/pcb/discrete/discrete-rf-board/lo.sch b/pcb/discrete/discrete-rf-board/lo.sch
new file mode 100644
index 0000000..fbd574b
--- /dev/null
+++ b/pcb/discrete/discrete-rf-board/lo.sch
@@ -0,0 +1,1031 @@
+EESchema Schematic File Version 4
+LIBS:discrete-rf-board-cache
+EELAYER 26 0
+EELAYER END
+$Descr A4 11693 8268
+encoding utf-8
+Sheet 2 4
+Title ""
+Date ""
+Rev ""
+Comp ""
+Comment1 ""
+Comment2 ""
+Comment3 ""
+Comment4 ""
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+$Comp
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+F 3 "" H 4200 3500 50  0001 C CNN
+	1    4200 3500
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+F 2 "" H 4400 5100 50  0001 C CNN
+F 3 "" H 4400 5100 50  0001 C CNN
+	1    4400 5100
+	1    0    0    -1  
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+F 2 "" H 1950 4550 50  0001 C CNN
+F 3 "~" H 1950 4550 50  0001 C CNN
+	1    1950 4550
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+$Comp
+L Device:L_Small L?
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+$Comp
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+Wire Wire Line
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+Connection ~ 5100 3250
+$Comp
+L power:GND #PWR?
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+F 0 "#PWR?" H 5650 2800 50  0001 C CNN
+F 1 "GND" H 5650 2900 50  0000 C CNN
+F 2 "" H 5650 3050 50  0001 C CNN
+F 3 "" H 5650 3050 50  0001 C CNN
+	1    5650 3050
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+$EndComp
+$Comp
+L power:GND #PWR?
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+F 0 "#PWR?" H 6050 2800 50  0001 C CNN
+F 1 "GND" H 6050 2900 50  0000 C CNN
+F 2 "" H 6050 3050 50  0001 C CNN
+F 3 "" H 6050 3050 50  0001 C CNN
+	1    6050 3050
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
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+Wire Wire Line
+	5650 3000 5650 3050
+Text Label 6700 2700 0    50   ~ 0
+3V3
+Text Label 6700 3100 0    50   ~ 0
+V_VCO
+$Comp
+L Device:R_Small R?
+U 1 1 5CA9E3E5
+P 6700 2900
+F 0 "R?" H 6730 2920 50  0000 L CNN
+F 1 "3.3R" H 6730 2860 50  0000 L CNN
+F 2 "" H 6700 2900 50  0001 C CNN
+F 3 "~" H 6700 2900 50  0001 C CNN
+	1    6700 2900
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
+	6700 2700 6700 2800
+Text Notes 5450 2550 0    50   ~ 0
+TODO size bypass caps right for 900 MHz
+$Comp
+L Device:C_Small C?
+U 1 1 5CAA0396
+P 7200 2900
+F 0 "C?" H 7210 2970 50  0000 L CNN
+F 1 "10 nF" H 7210 2820 50  0000 L CNN
+F 2 "" H 7200 2900 50  0001 C CNN
+F 3 "~" H 7200 2900 50  0001 C CNN
+	1    7200 2900
+	1    0    0    -1  
+$EndComp
+$Comp
+L Device:C_Small C?
+U 1 1 5CAA039D
+P 7600 2900
+F 0 "C?" H 7610 2970 50  0000 L CNN
+F 1 "10 nF" H 7610 2820 50  0000 L CNN
+F 2 "" H 7600 2900 50  0001 C CNN
+F 3 "~" H 7600 2900 50  0001 C CNN
+	1    7600 2900
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
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+Wire Wire Line
+	7600 2700 7200 2700
+Wire Wire Line
+	7200 2700 7200 2800
+Wire Wire Line
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+Connection ~ 7200 2700
+$Comp
+L power:GND #PWR?
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+P 7200 3050
+F 0 "#PWR?" H 7200 2800 50  0001 C CNN
+F 1 "GND" H 7200 2900 50  0000 C CNN
+F 2 "" H 7200 3050 50  0001 C CNN
+F 3 "" H 7200 3050 50  0001 C CNN
+	1    7200 3050
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+$EndComp
+$Comp
+L power:GND #PWR?
+U 1 1 5CAA03AF
+P 7600 3050
+F 0 "#PWR?" H 7600 2800 50  0001 C CNN
+F 1 "GND" H 7600 2900 50  0000 C CNN
+F 2 "" H 7600 3050 50  0001 C CNN
+F 3 "" H 7600 3050 50  0001 C CNN
+	1    7600 3050
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Text Label 5100 3800 0    50   ~ 0
+V_VCO
+Wire Wire Line
+	5100 3800 5000 3800
+Text Notes 2200 3400 0    50   ~ 0
+TODO figure out XTAL freq
+Text Notes 800  5300 0    50   ~ 0
+Optimum inductance = 3.98 nH\nTODO add 470R resistors in parallel with inductors\nplace the inductors at right angles to avoid coupling
+$Comp
+L Device:L_Small L?
+U 1 1 5CADEE7E
+P 6700 3450
+F 0 "L?" H 6730 3490 50  0000 L CNN
+F 1 "47 nH" H 6730 3410 50  0000 L CNN
+F 2 "" H 6700 3450 50  0001 C CNN
+F 3 "~" H 6700 3450 50  0001 C CNN
+	1    6700 3450
+	1    0    0    -1  
+$EndComp
+$Comp
+L Device:L_Small L?
+U 1 1 5CADEF1E
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+F 0 "L?" H 5930 3490 50  0000 L CNN
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+F 2 "" H 5900 3450 50  0001 C CNN
+F 3 "~" H 5900 3450 50  0001 C CNN
+	1    5900 3450
+	1    0    0    -1  
+$EndComp
+$Comp
+L Device:C_Small C?
+U 1 1 5CADF010
+P 6850 3650
+F 0 "C?" H 6860 3720 50  0000 L CNN
+F 1 "3.9 pF" H 6860 3570 50  0000 L CNN
+F 2 "" H 6850 3650 50  0001 C CNN
+F 3 "~" H 6850 3650 50  0001 C CNN
+	1    6850 3650
+	0    -1   1    0   
+$EndComp
+$Comp
+L Device:C_Small C?
+U 1 1 5CADF0E1
+P 6050 3650
+F 0 "C?" H 6060 3720 50  0000 L CNN
+F 1 "3.9 pF" H 6060 3570 50  0000 L CNN
+F 2 "" H 6050 3650 50  0001 C CNN
+F 3 "~" H 6050 3650 50  0001 C CNN
+	1    6050 3650
+	0    -1   1    0   
+$EndComp
+$Comp
+L Device:L_Small L?
+U 1 1 5CADF129
+P 6250 3850
+F 0 "L?" H 6280 3890 50  0000 L CNN
+F 1 "7.5 nH" H 6280 3810 50  0000 L CNN
+F 2 "" H 6250 3850 50  0001 C CNN
+F 3 "~" H 6250 3850 50  0001 C CNN
+	1    6250 3850
+	1    0    0    -1  
+$EndComp
+$Comp
+L Device:L_Small L?
+U 1 1 5CADF1C3
+P 7050 3850
+F 0 "L?" H 7080 3890 50  0000 L CNN
+F 1 "7.5 nH" H 7080 3810 50  0000 L CNN
+F 2 "" H 7050 3850 50  0001 C CNN
+F 3 "~" H 7050 3850 50  0001 C CNN
+	1    7050 3850
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
+	5000 3400 5750 3400
+Wire Wire Line
+	5750 3400 5750 3650
+Wire Wire Line
+	6150 3650 6250 3650
+Wire Wire Line
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+Wire Wire Line
+	5900 3300 6700 3300
+Wire Wire Line
+	6700 3200 6700 3300
+Connection ~ 6700 3200
+Wire Wire Line
+	6950 3650 7050 3650
+Wire Wire Line
+	7050 3650 7050 3750
+Wire Wire Line
+	6700 4100 5700 4100
+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
+	5750 3650 5900 3650
+Wire Wire Line
+	5950 3650 5900 3650
+Connection ~ 5900 3650
+Wire Wire Line
+	5900 3550 5900 3650
+Wire Wire Line
+	6700 3550 6700 3650
+Wire Wire Line
+	6750 3650 6700 3650
+Connection ~ 6700 3650
+Wire Wire Line
+	6700 3650 6700 4100
+Wire Wire Line
+	6700 3350 6700 3300
+Connection ~ 6700 3300
+Wire Wire Line
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+$Comp
+L discrete-parts:HHM17147A1 U?
+U 1 1 5CAFA1BF
+P 7300 4050
+F 0 "U?" H 7300 4050 50  0000 C CNN
+F 1 "HHM17147A1" H 7300 3550 50  0000 C CNN
+F 2 "" H 7300 4050 50  0001 C CNN
+F 3 "" H 7300 4050 50  0001 C CNN
+	1    7300 4050
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
+	6250 3950 6250 4450
+Wire Wire Line
+	6250 4450 7150 4450
+Wire Wire Line
+	7050 3950 7050 4150
+Wire Wire Line
+	7050 4150 7150 4150
+$Comp
+L power:GND #PWR?
+U 1 1 5CAFD202
+P 6950 4300
+F 0 "#PWR?" H 6950 4050 50  0001 C CNN
+F 1 "GND" H 6950 4150 50  0000 C CNN
+F 2 "" H 6950 4300 50  0001 C CNN
+F 3 "" H 6950 4300 50  0001 C CNN
+	1    6950 4300
+	0    1    1    0   
+$EndComp
+Wire Wire Line
+	6950 4300 7150 4300
+$Comp
+L power:GND #PWR?
+U 1 1 5CAFEAD6
+P 7650 4550
+F 0 "#PWR?" H 7650 4300 50  0001 C CNN
+F 1 "GND" H 7650 4400 50  0000 C CNN
+F 2 "" H 7650 4550 50  0001 C CNN
+F 3 "" H 7650 4550 50  0001 C CNN
+	1    7650 4550
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
+	7650 4550 7650 4450
+Wire Wire Line
+	7650 4450 7450 4450
+$Comp
+L Device:R_Small R?
+U 1 1 5CB0094A
+P 1550 4550
+F 0 "R?" H 1580 4570 50  0000 L CNN
+F 1 "470R" H 1580 4510 50  0000 L CNN
+F 2 "" H 1550 4550 50  0001 C CNN
+F 3 "~" H 1550 4550 50  0001 C CNN
+	1    1550 4550
+	-1   0    0    -1  
+$EndComp
+$Comp
+L Device:R_Small R?
+U 1 1 5CB00A07
+P 2700 4550
+F 0 "R?" H 2730 4570 50  0000 L CNN
+F 1 "470R" H 2730 4510 50  0000 L CNN
+F 2 "" H 2700 4550 50  0001 C CNN
+F 3 "~" H 2700 4550 50  0001 C CNN
+	1    2700 4550
+	-1   0    0    -1  
+$EndComp
+Wire Wire Line
+	1550 4450 1550 4350
+Wire Wire Line
+	1550 4350 1950 4350
+Connection ~ 1950 4350
+Wire Wire Line
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+Wire Wire Line
+	2350 4350 2700 4350
+Wire Wire Line
+	2700 4350 2700 4450
+Connection ~ 2350 4350
+Wire Wire Line
+	2350 4350 2350 4450
+$Comp
+L power:GND #PWR?
+U 1 1 5CB044CF
+P 2700 4700
+F 0 "#PWR?" H 2700 4450 50  0001 C CNN
+F 1 "GND" H 2700 4550 50  0000 C CNN
+F 2 "" H 2700 4700 50  0001 C CNN
+F 3 "" H 2700 4700 50  0001 C CNN
+	1    2700 4700
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
+	2700 4650 2700 4700
+$Comp
+L power:GND #PWR?
+U 1 1 5CB06595
+P 1550 4700
+F 0 "#PWR?" H 1550 4450 50  0001 C CNN
+F 1 "GND" H 1550 4550 50  0000 C CNN
+F 2 "" H 1550 4700 50  0001 C CNN
+F 3 "" H 1550 4700 50  0001 C CNN
+	1    1550 4700
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
+	1550 4650 1550 4700
+$Comp
+L discrete-parts:Q_NPN_BCEE Q?
+U 1 1 5CB0C390
+P 9200 4150
+F 0 "Q?" H 9500 4150 50  0000 C CNN
+F 1 "BFU520" H 9400 4050 50  0000 L CNN
+F 2 "" H 9200 4150 50  0001 C CNN
+F 3 "" H 9200 4150 50  0001 C CNN
+F 4 "771-BFU520XRR" H 9200 4150 50  0001 C CNN "Mouser"
+	1    9200 4150
+	1    0    0    -1  
+$EndComp
+Text Notes 7100 4700 0    50   ~ 0
+IL=-0.7dB
+Text HLabel 10350 3550 2    50   Input ~ 0
+LO
+$Comp
+L power:GND #PWR?
+U 1 1 5CB0CCE1
+P 9250 4450
+F 0 "#PWR?" H 9250 4200 50  0001 C CNN
+F 1 "GND" H 9250 4300 50  0000 C CNN
+F 2 "" H 9250 4450 50  0001 C CNN
+F 3 "" H 9250 4450 50  0001 C CNN
+	1    9250 4450
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
+	9250 4350 9250 4400
+Wire Wire Line
+	9350 4350 9350 4400
+Wire Wire Line
+	9350 4400 9250 4400
+Connection ~ 9250 4400
+Wire Wire Line
+	9250 4400 9250 4450
+$Comp
+L Connector:Conn_Coaxial J?
+U 1 1 5CB11865
+P 7850 3600
+F 0 "J?" H 7860 3720 50  0000 C CNN
+F 1 "Conn_Coaxial" V 7965 3600 50  0000 C CNN
+F 2 "" H 7850 3600 50  0001 C CNN
+F 3 " ~" H 7850 3600 50  0001 C CNN
+	1    7850 3600
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
+	7650 3600 7550 3600
+Wire Wire Line
+	7550 3600 7550 4150
+Wire Wire Line
+	7550 4150 7450 4150
+$Comp
+L power:GND #PWR?
+U 1 1 5CB13F61
+P 7850 3850
+F 0 "#PWR?" H 7850 3600 50  0001 C CNN
+F 1 "GND" H 7850 3700 50  0000 C CNN
+F 2 "" H 7850 3850 50  0001 C CNN
+F 3 "" H 7850 3850 50  0001 C CNN
+	1    7850 3850
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
+	7850 3800 7850 3850
+$Comp
+L Connector:Conn_Coaxial J?
+U 1 1 5CB1681E
+P 10100 3850
+F 0 "J?" H 10110 3970 50  0000 C CNN
+F 1 "Conn_Coaxial" V 10215 3850 50  0000 C CNN
+F 2 "" H 10100 3850 50  0001 C CNN
+F 3 " ~" H 10100 3850 50  0001 C CNN
+	1    10100 3850
+	1    0    0    -1  
+$EndComp
+$Comp
+L power:GND #PWR?
+U 1 1 5CB16963
+P 10100 4100
+F 0 "#PWR?" H 10100 3850 50  0001 C CNN
+F 1 "GND" H 10100 3950 50  0000 C CNN
+F 2 "" H 10100 4100 50  0001 C CNN
+F 3 "" H 10100 4100 50  0001 C CNN
+	1    10100 4100
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
+	10100 4050 10100 4100
+Text Notes 6250 4650 0    50   ~ 0
+-3 to +5dBm?\ndatasheet is unclear
+Wire Wire Line
+	10350 3550 9650 3550
+Wire Wire Line
+	9650 3550 9650 3850
+Wire Wire Line
+	9650 3850 9750 3850
+$Comp
+L Device:R_Small R?
+U 1 1 5CB210CB
+P 7900 4150
+F 0 "R?" H 7930 4170 50  0000 L CNN
+F 1 "0R" H 7930 4110 50  0000 L CNN
+F 2 "" H 7900 4150 50  0001 C CNN
+F 3 "~" H 7900 4150 50  0001 C CNN
+	1    7900 4150
+	0    -1   1    0   
+$EndComp
+$Comp
+L Device:R_Small R?
+U 1 1 5CB23A7E
+P 8400 4150
+F 0 "R?" H 8430 4170 50  0000 L CNN
+F 1 "0R" H 8430 4110 50  0000 L CNN
+F 2 "" H 8400 4150 50  0001 C CNN
+F 3 "~" H 8400 4150 50  0001 C CNN
+	1    8400 4150
+	0    -1   1    0   
+$EndComp
+$Comp
+L Device:R_Small R?
+U 1 1 5CB23AD2
+P 8150 4400
+F 0 "R?" H 8180 4420 50  0000 L CNN
+F 1 "DNP" H 8180 4360 50  0000 L CNN
+F 2 "" H 8150 4400 50  0001 C CNN
+F 3 "~" H 8150 4400 50  0001 C CNN
+	1    8150 4400
+	1    0    0    -1  
+$EndComp
+$Comp
+L power:GND #PWR?
+U 1 1 5CB23C2B
+P 8150 4600
+F 0 "#PWR?" H 8150 4350 50  0001 C CNN
+F 1 "GND" H 8150 4450 50  0000 C CNN
+F 2 "" H 8150 4600 50  0001 C CNN
+F 3 "" H 8150 4600 50  0001 C CNN
+	1    8150 4600
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
+	8150 4600 8150 4500
+Wire Wire Line
+	8000 4150 8150 4150
+Wire Wire Line
+	8150 4150 8150 4300
+Connection ~ 8150 4150
+Wire Wire Line
+	8150 4150 8300 4150
+Wire Wire Line
+	7800 4150 7550 4150
+Connection ~ 7550 4150
+$Comp
+L Device:L_Small L?
+U 1 1 5CB34436
+P 8600 4400
+F 0 "L?" H 8630 4440 50  0000 L CNN
+F 1 "L_Small" H 8630 4360 50  0000 L CNN
+F 2 "" H 8600 4400 50  0001 C CNN
+F 3 "~" H 8600 4400 50  0001 C CNN
+	1    8600 4400
+	1    0    0    -1  
+$EndComp
+$Comp
+L Device:C_Small C?
+U 1 1 5CB344FD
+P 8750 4150
+F 0 "C?" H 8760 4220 50  0000 L CNN
+F 1 "C_Small" H 8760 4070 50  0000 L CNN
+F 2 "" H 8750 4150 50  0001 C CNN
+F 3 "~" H 8750 4150 50  0001 C CNN
+	1    8750 4150
+	0    -1   -1   0   
+$EndComp
+$Comp
+L Device:R_Small R?
+U 1 1 5CB34623
+P 8450 3200
+F 0 "R?" H 8480 3220 50  0000 L CNN
+F 1 "3.3k" H 8480 3160 50  0000 L CNN
+F 2 "" H 8450 3200 50  0001 C CNN
+F 3 "~" H 8450 3200 50  0001 C CNN
+	1    8450 3200
+	-1   0    0    -1  
+$EndComp
+Wire Wire Line
+	8500 4150 8600 4150
+Wire Wire Line
+	8600 4150 8600 4300
+Connection ~ 8600 4150
+Wire Wire Line
+	8600 4150 8650 4150
+$Comp
+L power:GND #PWR?
+U 1 1 5CB3CE0A
+P 8600 4600
+F 0 "#PWR?" H 8600 4350 50  0001 C CNN
+F 1 "GND" H 8600 4450 50  0000 C CNN
+F 2 "" H 8600 4600 50  0001 C CNN
+F 3 "" H 8600 4600 50  0001 C CNN
+	1    8600 4600
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
+	8600 4500 8600 4600
+Wire Wire Line
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+Connection ~ 8900 4150
+Wire Wire Line
+	8900 4150 8950 4150
+$Comp
+L Device:C_Small C?
+U 1 1 5CB45D4E
+P 9400 3850
+F 0 "C?" H 9410 3920 50  0000 L CNN
+F 1 "C_Small" H 9410 3770 50  0000 L CNN
+F 2 "" H 9400 3850 50  0001 C CNN
+F 3 "~" H 9400 3850 50  0001 C CNN
+	1    9400 3850
+	0    -1   -1   0   
+$EndComp
+$Comp
+L Device:L_Small L?
+U 1 1 5CB45DB8
+P 9750 4300
+F 0 "L?" H 9780 4340 50  0000 L CNN
+F 1 "L_Small" H 9780 4260 50  0000 L CNN
+F 2 "" H 9750 4300 50  0001 C CNN
+F 3 "~" H 9750 4300 50  0001 C CNN
+	1    9750 4300
+	1    0    0    -1  
+$EndComp
+$Comp
+L power:GND #PWR?
+U 1 1 5CB48FE3
+P 9750 4500
+F 0 "#PWR?" H 9750 4250 50  0001 C CNN
+F 1 "GND" H 9750 4350 50  0000 C CNN
+F 2 "" H 9750 4500 50  0001 C CNN
+F 3 "" H 9750 4500 50  0001 C CNN
+	1    9750 4500
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
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+Wire Wire Line
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+Connection ~ 9750 3850
+Wire Wire Line
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+Wire Wire Line
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+Connection ~ 9650 3850
+Wire Wire Line
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+Wire Wire Line
+	9250 3850 9250 3950
+$Comp
+L Device:L_Small L?
+U 1 1 5CB55D86
+P 9250 3400
+F 0 "L?" H 9280 3440 50  0000 L CNN
+F 1 "47 nH" H 9280 3360 50  0000 L CNN
+F 2 "" H 9250 3400 50  0001 C CNN
+F 3 "~" H 9250 3400 50  0001 C CNN
+	1    9250 3400
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
+	9250 3500 9250 3850
+Connection ~ 9250 3850
+$Comp
+L Device:R_Small R?
+U 1 1 5CB594A1
+P 9250 3000
+F 0 "R?" H 9280 3020 50  0000 L CNN
+F 1 "22R" H 9280 2960 50  0000 L CNN
+F 2 "" H 9250 3000 50  0001 C CNN
+F 3 "~" H 9250 3000 50  0001 C CNN
+	1    9250 3000
+	1    0    0    -1  
+$EndComp
+$Comp
+L Device:C_Small C?
+U 1 1 5CB5CE26
+P 9950 2950
+F 0 "C?" H 9960 3020 50  0000 L CNN
+F 1 "10 nF" H 9960 2870 50  0000 L CNN
+F 2 "" H 9950 2950 50  0001 C CNN
+F 3 "~" H 9950 2950 50  0001 C CNN
+	1    9950 2950
+	1    0    0    -1  
+$EndComp
+$Comp
+L Device:C_Small C?
+U 1 1 5CB5CE2D
+P 10350 2950
+F 0 "C?" H 10360 3020 50  0000 L CNN
+F 1 "10 nF" H 10360 2870 50  0000 L CNN
+F 2 "" H 10350 2950 50  0001 C CNN
+F 3 "~" H 10350 2950 50  0001 C CNN
+	1    10350 2950
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
+	9950 2750 9950 2850
+Wire Wire Line
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+Connection ~ 9950 2750
+$Comp
+L power:GND #PWR?
+U 1 1 5CB5CE39
+P 9950 3100
+F 0 "#PWR?" H 9950 2850 50  0001 C CNN
+F 1 "GND" H 9950 2950 50  0000 C CNN
+F 2 "" H 9950 3100 50  0001 C CNN
+F 3 "" H 9950 3100 50  0001 C CNN
+	1    9950 3100
+	1    0    0    -1  
+$EndComp
+$Comp
+L power:GND #PWR?
+U 1 1 5CB5CE3F
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+F 0 "#PWR?" H 10350 2850 50  0001 C CNN
+F 1 "GND" H 10350 2950 50  0000 C CNN
+F 2 "" H 10350 3100 50  0001 C CNN
+F 3 "" H 10350 3100 50  0001 C CNN
+	1    10350 3100
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+$EndComp
+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
+	9250 3200 9250 3300
+Wire Wire Line
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+Connection ~ 9250 3200
+$Comp
+L Device:R_Small R?
+U 1 1 5CB71150
+P 8900 3200
+F 0 "R?" H 8930 3220 50  0000 L CNN
+F 1 "8.2k" H 8930 3160 50  0000 L CNN
+F 2 "" H 8900 3200 50  0001 C CNN
+F 3 "~" H 8900 3200 50  0001 C CNN
+	1    8900 3200
+	-1   0    0    -1  
+$EndComp
+$Comp
+L power:GND #PWR?
+U 1 1 5CB71382
+P 8450 3450
+F 0 "#PWR?" H 8450 3200 50  0001 C CNN
+F 1 "GND" H 8450 3300 50  0000 C CNN
+F 2 "" H 8450 3450 50  0001 C CNN
+F 3 "" H 8450 3450 50  0001 C CNN
+	1    8450 3450
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
+	8450 3300 8450 3450
+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
+	8900 3400 8900 3300
+Wire Wire Line
+	8900 3100 8900 2950
+Wire Wire Line
+	8900 2950 9100 2950
+Wire Wire Line
+	9100 2950 9100 3150
+Wire Wire Line
+	9100 3150 9250 3150
+Connection ~ 9250 3150
+Wire Wire Line
+	9250 3150 9250 3200
+Wire Wire Line
+	8900 3400 8900 4150
+Connection ~ 8900 3400
+Text Notes 9100 4750 0    50   ~ 0
+~~10 dB gain
+Text Notes 8550 2300 0    50   ~ 0
+TODO figure out DC biasing network
+Text Label 9250 2700 0    50   ~ 0
+5V
+Text Notes 9400 2500 0    50   ~ 0
+20 mA bias current
+Text Notes 9400 4950 0    50   ~ 0
+Compression point should at ~~2dBm
+Text HLabel 9250 2600 1    50   Input ~ 0
++5V0
+Wire Wire Line
+	9250 2600 9250 2900
+$EndSCHEMATC
diff --git a/pcb/discrete/discrete-rf-board/receiver.bak b/pcb/discrete/discrete-rf-board/receiver.bak
new file mode 100644
index 0000000..acee250
--- /dev/null
+++ b/pcb/discrete/discrete-rf-board/receiver.bak
@@ -0,0 +1,17 @@
+EESchema Schematic File Version 4
+LIBS:discrete-rf-board-cache
+EELAYER 26 0
+EELAYER END
+$Descr A4 11693 8268
+encoding utf-8
+Sheet 3 4
+Title ""
+Date ""
+Rev ""
+Comp ""
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+$EndDescr
+$EndSCHEMATC
diff --git a/pcb/discrete/discrete-rf-board/receiver.sch b/pcb/discrete/discrete-rf-board/receiver.sch
new file mode 100644
index 0000000..acee250
--- /dev/null
+++ b/pcb/discrete/discrete-rf-board/receiver.sch
@@ -0,0 +1,17 @@
+EESchema Schematic File Version 4
+LIBS:discrete-rf-board-cache
+EELAYER 26 0
+EELAYER END
+$Descr A4 11693 8268
+encoding utf-8
+Sheet 3 4
+Title ""
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+$EndDescr
+$EndSCHEMATC
diff --git a/pcb/discrete/discrete-rf-board/sym-lib-table b/pcb/discrete/discrete-rf-board/sym-lib-table
new file mode 100644
index 0000000..f92869a
--- /dev/null
+++ b/pcb/discrete/discrete-rf-board/sym-lib-table
@@ -0,0 +1,3 @@
+(sym_lib_table
+  (lib (name discrete-parts)(type Legacy)(uri /home/kelvin/repos/ism-915mhz-transceiver/pcb/discrete/discrete-rf-board/discrete-parts.lib)(options "")(descr ""))
+)
diff --git a/pcb/discrete/discrete-rf-board/transmitter.bak b/pcb/discrete/discrete-rf-board/transmitter.bak
new file mode 100644
index 0000000..16b5bd2
--- /dev/null
+++ b/pcb/discrete/discrete-rf-board/transmitter.bak
@@ -0,0 +1,17 @@
+EESchema Schematic File Version 4
+LIBS:discrete-rf-board-cache
+EELAYER 26 0
+EELAYER END
+$Descr A4 11693 8268
+encoding utf-8
+Sheet 1 4
+Title ""
+Date ""
+Rev ""
+Comp ""
+Comment1 ""
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+Comment3 ""
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+$EndDescr
+$EndSCHEMATC
diff --git a/pcb/discrete/discrete-rf-board/transmitter.sch b/pcb/discrete/discrete-rf-board/transmitter.sch
new file mode 100644
index 0000000..16b5bd2
--- /dev/null
+++ b/pcb/discrete/discrete-rf-board/transmitter.sch
@@ -0,0 +1,17 @@
+EESchema Schematic File Version 4
+LIBS:discrete-rf-board-cache
+EELAYER 26 0
+EELAYER END
+$Descr A4 11693 8268
+encoding utf-8
+Sheet 1 4
+Title ""
+Date ""
+Rev ""
+Comp ""
+Comment1 ""
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+$EndDescr
+$EndSCHEMATC