From 3df9f0dc1700ff56d6e1bff48c0212bc9f80fcdd Mon Sep 17 00:00:00 2001 From: Kelvin Ly <kelvin.ly1618@gmail.com> Date: Wed, 25 Sep 2019 19:21:54 -0400 Subject: [PATCH] Start work on simpler RF board using less discrete components so it's not a giant mess --- pcb/discrete/integrated-rf-board/README.md | 19 + .../integrated-rf-board/fp-info-cache | 428 ++++++++++++++++++ .../integrated-rf-board-cache.lib | 4 + .../integrated-rf-board.bak | 17 + .../integrated-rf-board.kicad_pcb | 116 +++++ .../integrated-rf-board.kicad_pcb-bak | 116 +++++ .../integrated-rf-board.pro | 41 ++ .../integrated-rf-board.sch | 16 + sim/friis.py | 13 + 9 files changed, 770 insertions(+) create mode 100644 pcb/discrete/integrated-rf-board/README.md create mode 100644 pcb/discrete/integrated-rf-board/fp-info-cache create mode 100644 pcb/discrete/integrated-rf-board/integrated-rf-board-cache.lib create mode 100644 pcb/discrete/integrated-rf-board/integrated-rf-board.bak create mode 100644 pcb/discrete/integrated-rf-board/integrated-rf-board.kicad_pcb create mode 100644 pcb/discrete/integrated-rf-board/integrated-rf-board.kicad_pcb-bak create mode 100644 pcb/discrete/integrated-rf-board/integrated-rf-board.pro create mode 100644 pcb/discrete/integrated-rf-board/integrated-rf-board.sch create mode 100644 sim/friis.py diff --git a/pcb/discrete/integrated-rf-board/README.md b/pcb/discrete/integrated-rf-board/README.md new file mode 100644 index 0000000..6131733 --- /dev/null +++ b/pcb/discrete/integrated-rf-board/README.md @@ -0,0 +1,19 @@ +# OSH Park-compatible 2 Layer KiCad Template + +This is a KiCad template to simplify making printed circuit boards. + +It comes with all the design rules to meet the 2-layer OSH Park specs and stackup. + +- <a href="http://docs.oshpark.com/services/two-layer/">OSH Park Two Layer Specs</a> +- <a href="http://docs.oshpark.com/design-tools/kicad">OSH Park KiCad help</a> + +### Instructions + +1. Open KiCad. +1. Open Preferences > Configure Paths and note the value of 'KICAD_PTEMPLATES'. +1. In KiCad, open File > New Project > New Project from Template. +1. Select the location of your new project. The name of the folder will be the name of your project. +1. The templates with folders in the 'KICAD_PTEMPLATES' are listed under 'Portable Templates" tab. +1. Select the template and click 'OK'. +1. Your project now exists, so you can open EESchema and PCBNew and design as usual. + diff --git a/pcb/discrete/integrated-rf-board/fp-info-cache b/pcb/discrete/integrated-rf-board/fp-info-cache new file mode 100644 index 0000000..449a375 --- /dev/null +++ b/pcb/discrete/integrated-rf-board/fp-info-cache @@ -0,0 +1,428 @@ +95544409801182 +Resistor_SMD +R_0201_0603Metric +Resistor SMD 0201 (0603 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://www.vishay.com/docs/20052/crcw0201e3.pdf), generated with kicad-footprint-generator +resistor +0 +4 +2 +Resistor_SMD +R_0402_1005Metric +Resistor SMD 0402 (1005 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +resistor +0 +2 +2 +Resistor_SMD +R_0603_1608Metric +Resistor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +resistor +0 +2 +2 +Resistor_SMD +R_0603_1608Metric_Pad1.05x0.95mm_HandSolder +Resistor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +resistor handsolder +0 +2 +2 +Resistor_SMD +R_0612_1632Metric +Resistor SMD 0612 (1632 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://www.vishay.com/docs/20019/rcwe.pdf), generated with kicad-footprint-generator +resistor +0 +2 +2 +Resistor_SMD +R_0612_1632Metric_Pad1.18x3.40mm_HandSolder +Resistor SMD 0612 (1632 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: https://www.vishay.com/docs/20019/rcwe.pdf), generated with kicad-footprint-generator +resistor handsolder +0 +2 +2 +Resistor_SMD +R_0805_2012Metric +Resistor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator +resistor +0 +2 +2 +Resistor_SMD +R_0805_2012Metric_Pad1.15x1.40mm_HandSolder +Resistor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator +resistor handsolder +0 +2 +2 +Resistor_SMD +R_0815_2038Metric +Resistor SMD 0815 (2038 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.yageo.com/documents/recent/PYu-PRPFPH_521_RoHS_L_0.pdf), generated with kicad-footprint-generator +resistor +0 +2 +2 +Resistor_SMD +R_0815_2038Metric_Pad1.53x4.00mm_HandSolder +Resistor SMD 0815 (2038 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: http://www.yageo.com/documents/recent/PYu-PRPFPH_521_RoHS_L_0.pdf), generated with kicad-footprint-generator +resistor handsolder +0 +2 +2 +Resistor_SMD +R_01005_0402Metric +Resistor SMD 01005 (0402 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.vishay.com/docs/20056/crcw01005e3.pdf), generated with kicad-footprint-generator +resistor +0 +4 +2 +Resistor_SMD +R_1020_2550Metric +Resistor SMD 1020 (2550 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://www.vishay.com/docs/20019/rcwe.pdf), generated with kicad-footprint-generator +resistor +0 +2 +2 +Resistor_SMD +R_1020_2550Metric_Pad1.33x5.20mm_HandSolder +Resistor SMD 1020 (2550 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: https://www.vishay.com/docs/20019/rcwe.pdf), generated with kicad-footprint-generator +resistor handsolder +0 +2 +2 +Resistor_SMD +R_1206_3216Metric +Resistor SMD 1206 (3216 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +resistor +0 +2 +2 +Resistor_SMD +R_1206_3216Metric_Pad1.42x1.75mm_HandSolder +Resistor SMD 1206 (3216 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +resistor handsolder +0 +2 +2 +Resistor_SMD +R_1210_3225Metric +Resistor SMD 1210 (3225 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +resistor +0 +2 +2 +Resistor_SMD +R_1210_3225Metric_Pad1.42x2.65mm_HandSolder +Resistor SMD 1210 (3225 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +resistor handsolder +0 +2 +2 +Resistor_SMD +R_1218_3246Metric +Resistor SMD 1218 (3246 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://www.vishay.com/docs/20035/dcrcwe3.pdf), generated with kicad-footprint-generator +resistor +0 +2 +2 +Resistor_SMD +R_1218_3246Metric_Pad1.22x4.75mm_HandSolder +Resistor SMD 1218 (3246 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: https://www.vishay.com/docs/20035/dcrcwe3.pdf), generated with kicad-footprint-generator +resistor handsolder +0 +2 +2 +Resistor_SMD +R_1806_4516Metric +Resistor SMD 1806 (4516 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://www.modelithics.com/models/Vendor/MuRata/BLM41P.pdf), generated with kicad-footprint-generator +resistor +0 +2 +2 +Resistor_SMD +R_1806_4516Metric_Pad1.57x1.80mm_HandSolder +Resistor SMD 1806 (4516 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: https://www.modelithics.com/models/Vendor/MuRata/BLM41P.pdf), generated with kicad-footprint-generator +resistor handsolder +0 +2 +2 +Resistor_SMD +R_1812_4532Metric +Resistor SMD 1812 (4532 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://www.nikhef.nl/pub/departments/mt/projects/detectorR_D/dtddice/ERJ2G.pdf), generated with kicad-footprint-generator +resistor +0 +2 +2 +Resistor_SMD +R_1812_4532Metric_Pad1.30x3.40mm_HandSolder +Resistor SMD 1812 (4532 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: https://www.nikhef.nl/pub/departments/mt/projects/detectorR_D/dtddice/ERJ2G.pdf), generated with kicad-footprint-generator +resistor handsolder +0 +2 +2 +Resistor_SMD +R_2010_5025Metric +Resistor SMD 2010 (5025 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +resistor +0 +2 +2 +Resistor_SMD +R_2010_5025Metric_Pad1.52x2.65mm_HandSolder +Resistor SMD 2010 (5025 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +resistor handsolder +0 +2 +2 +Resistor_SMD +R_2512_6332Metric +Resistor SMD 2512 (6332 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +resistor +0 +2 +2 +Resistor_SMD +R_2512_6332Metric_Pad1.52x3.35mm_HandSolder +Resistor SMD 2512 (6332 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +resistor handsolder +0 +2 +2 +Resistor_SMD +R_2816_7142Metric +Resistor SMD 2816 (7142 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size from: https://www.vishay.com/docs/30100/wsl.pdf), generated with kicad-footprint-generator +resistor +0 +2 +2 +Resistor_SMD +R_2816_7142Metric_Pad3.20x4.45mm_HandSolder +Resistor SMD 2816 (7142 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size from: https://www.vishay.com/docs/30100/wsl.pdf), generated with kicad-footprint-generator +resistor handsolder +0 +2 +2 +Resistor_SMD +R_4020_10251Metric +Resistor SMD 4020 (10251 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://datasheet.octopart.com/HVC0603T5004FET-Ohmite-datasheet-26699797.pdf), generated with kicad-footprint-generator +resistor +0 +2 +2 +Resistor_SMD +R_4020_10251Metric_Pad1.65x5.30mm_HandSolder +Resistor SMD 4020 (10251 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: http://datasheet.octopart.com/HVC0603T5004FET-Ohmite-datasheet-26699797.pdf), generated with kicad-footprint-generator +resistor handsolder +0 +2 +2 +Resistor_SMD +R_Array_Concave_2x0603 +Thick Film Chip Resistor Array, Wave soldering, Vishay CRA06P (see cra06p.pdf) +resistor array +0 +4 +4 +Resistor_SMD +R_Array_Concave_4x0402 +Thick Film Chip Resistor Array, Wave soldering, Vishay CRA04P (see cra04p.pdf) +resistor array +0 +8 +8 +Resistor_SMD +R_Array_Concave_4x0603 +Thick Film Chip Resistor Array, Wave soldering, Vishay CRA06P (see cra06p.pdf) +resistor array +0 +8 +8 +Resistor_SMD +R_Array_Convex_2x0402 +Chip Resistor Network, ROHM MNR02 (see mnr_g.pdf) +resistor array +0 +4 +4 +Resistor_SMD +R_Array_Convex_2x0603 +Chip Resistor Network, ROHM MNR12 (see mnr_g.pdf) +resistor array +0 +4 +4 +Resistor_SMD +R_Array_Convex_2x0606 +Precision Thin Film Chip Resistor Array, VISHAY (see http://www.vishay.com/docs/28770/acasat.pdf) +resistor array +0 +4 +4 +Resistor_SMD +R_Array_Convex_2x1206 +Chip Resistor Network, ROHM MNR32 (see mnr_g.pdf) +resistor array +0 +4 +4 +Resistor_SMD +R_Array_Convex_4x0402 +Chip Resistor Network, ROHM MNR04 (see mnr_g.pdf) +resistor array +0 +8 +8 +Resistor_SMD +R_Array_Convex_4x0603 +Chip Resistor Network, ROHM MNR14 (see mnr_g.pdf) +resistor array +0 +8 +8 +Resistor_SMD +R_Array_Convex_4x0612 +Precision Thin Film Chip Resistor Array, VISHAY (see http://www.vishay.com/docs/28770/acasat.pdf) +resistor array +0 +8 +8 +Resistor_SMD +R_Array_Convex_4x1206 +Chip Resistor Network, ROHM MNR34 (see mnr_g.pdf) +resistor array +0 +8 +8 +Resistor_SMD +R_Array_Convex_5x0603 +Chip Resistor Network, ROHM MNR15 (see mnr_g.pdf) +resistor array +0 +10 +10 +Resistor_SMD +R_Array_Convex_5x1206 +Chip Resistor Network, ROHM MNR35 (see mnr_g.pdf) +resistor array +0 +10 +10 +Resistor_SMD +R_Array_Convex_8x0602 +Chip Resistor Network, ROHM MNR18 (see mnr_g.pdf) +resistor array +0 +16 +16 +Resistor_SMD +R_Cat16-2 +SMT resistor net, Bourns CAT16 series, 2 way +SMT resistor net Bourns CAT16 series 2 way +0 +4 +4 +Resistor_SMD +R_Cat16-4 +SMT resistor net, Bourns CAT16 series, 4 way +SMT resistor net Bourns CAT16 series 4 way +0 +8 +8 +Resistor_SMD +R_Cat16-8 +SMT resistor net, Bourns CAT16 series, 8 way +SMT resistor net Bourns CAT16 series 8 way +0 +16 +16 +Resistor_SMD +R_MELF_MMB-0207 +Resistor, MELF, MMB-0207, http://www.vishay.com/docs/28713/melfprof.pdf +MELF Resistor +0 +2 +2 +Resistor_SMD +R_MicroMELF_MMU-0102 +Resistor, MicroMELF, MMU-0102, http://www.vishay.com/docs/28713/melfprof.pdf +MicroMELF Resistor +0 +2 +2 +Resistor_SMD +R_MiniMELF_MMA-0204 +Resistor, MiniMELF, MMA-0204, http://www.vishay.com/docs/28713/melfprof.pdf +MiniMELF Resistor +0 +2 +2 +Resistor_SMD +R_Shunt_Ohmite_LVK12 +4 contact shunt resistor +shunt resistor 4 contacts +0 +4 +4 +Resistor_SMD +R_Shunt_Ohmite_LVK20 +4 contacts shunt resistor, https://www.ohmite.com/assets/docs/res_lvk.pdf +4 contacts resistor smd +0 +4 +4 +Resistor_SMD +R_Shunt_Ohmite_LVK24 +4 contacts shunt resistor,https://www.ohmite.com/assets/docs/res_lvk.pdf +4 contacts resistor smd +0 +4 +4 +Resistor_SMD +R_Shunt_Ohmite_LVK25 +4 contacts shunt resistor,https://www.ohmite.com/assets/docs/res_lvk.pdf +4 contacts resistor smd +0 +4 +4 +Resistor_SMD +R_Shunt_Vishay_WSK2512_6332Metric_T1.19mm +Shunt Resistor SMD 2512 (6332 Metric), 2.6mm thick, Vishay WKS2512, Terminal length (T) 1.19mm, 5 to 200 milli Ohm (http://http://www.vishay.com/docs/30108/wsk.pdf) +resistor shunt WSK2512 +0 +4 +4 +Resistor_SMD +R_Shunt_Vishay_WSK2512_6332Metric_T2.21mm +Shunt Resistor SMD 2512 (6332 Metric), 2.6mm thick, Vishay WKS2512, Terminal length (T) 2.21mm, 1 to 4.9 milli Ohm (http://http://www.vishay.com/docs/30108/wsk.pdf) +resistor shunt WSK2512 +0 +4 +4 +Resistor_SMD +R_Shunt_Vishay_WSK2512_6332Metric_T2.66mm +Shunt Resistor SMD 2512 (6332 Metric), 2.6mm thick, Vishay WKS2512, Terminal length (T) 2.66mm, 0.5 to 0.99 milli Ohm (http://http://www.vishay.com/docs/30108/wsk.pdf) +resistor shunt WSK2512 +0 +4 +4 +Resistor_SMD +R_Shunt_Vishay_WSKW0612 +https://www.vishay.com/docs/30332/wskw0612.pdf +4-Terminal SMD Shunt +0 +4 +4 +Resistor_SMD +R_Shunt_Vishay_WSR2_WSR3 +Power Metal Strip Resistors 0.005 to 0.2, https://www.vishay.com/docs/30101/wsr.pdf +SMD Shunt Resistor +0 +2 +2 +Resistor_SMD +R_Shunt_Vishay_WSR2_WSR3_KelvinConnection +Power Metal Strip Resistors 0.005 to 0.2, https://www.vishay.com/docs/30101/wsr.pdf +SMD Shunt Resistor +0 +4 +2 diff --git a/pcb/discrete/integrated-rf-board/integrated-rf-board-cache.lib b/pcb/discrete/integrated-rf-board/integrated-rf-board-cache.lib new file mode 100644 index 0000000..e933dba --- /dev/null +++ b/pcb/discrete/integrated-rf-board/integrated-rf-board-cache.lib @@ -0,0 +1,4 @@ +EESchema-LIBRARY Version 2.4 +#encoding utf-8 +# +#End Library diff --git a/pcb/discrete/integrated-rf-board/integrated-rf-board.bak b/pcb/discrete/integrated-rf-board/integrated-rf-board.bak new file mode 100644 index 0000000..f2476bf --- /dev/null +++ b/pcb/discrete/integrated-rf-board/integrated-rf-board.bak @@ -0,0 +1,17 @@ +EESchema Schematic File Version 2 +LIBS:power +EELAYER 25 0 +EELAYER END +$Descr USLetter 11000 8500 +encoding utf-8 +Sheet 1 1 +Title "" +Date "" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$EndSCHEMATC diff --git a/pcb/discrete/integrated-rf-board/integrated-rf-board.kicad_pcb b/pcb/discrete/integrated-rf-board/integrated-rf-board.kicad_pcb new file mode 100644 index 0000000..d1ed45b --- /dev/null +++ b/pcb/discrete/integrated-rf-board/integrated-rf-board.kicad_pcb @@ -0,0 +1,116 @@ +(kicad_pcb (version 20171130) (host pcbnew 5.0.0) + + (general + (thickness 1.6) + (drawings 1) + (tracks 0) + (zones 0) + (modules 0) + (nets 1) + ) + + (page USLetter) + (title_block + (title "Project Title") + ) + + (layers + (0 F.Cu signal) + (31 B.Cu signal) + (34 B.Paste user) + (35 F.Paste user) + (36 B.SilkS user) + (37 F.SilkS user) + (38 B.Mask user) + (39 F.Mask user) + (40 Dwgs.User user) + (44 Edge.Cuts user) + (46 B.CrtYd user) + (47 F.CrtYd user) + (48 B.Fab user) + (49 F.Fab user) + ) + + (setup + (last_trace_width 0.1524) + (user_trace_width 0.1524) + (user_trace_width 0.254) + (user_trace_width 0.3302) + (user_trace_width 0.508) + (user_trace_width 0.762) + (user_trace_width 1.27) + (trace_clearance 0.1524) + (zone_clearance 0.508) + (zone_45_only no) + (trace_min 0.1524) + (segment_width 0.1524) + (edge_width 0.1524) + (via_size 0.6858) + (via_drill 0.3302) + (via_min_size 0.6858) + (via_min_drill 0.3302) + (user_via 0.6858 0.3302) + (user_via 0.762 0.4064) + (user_via 0.8636 0.508) + (uvia_size 0.6858) + (uvia_drill 0.3302) + (uvias_allowed no) + (uvia_min_size 0) + (uvia_min_drill 0) + (pcb_text_width 0.1524) + (pcb_text_size 1.016 1.016) + (mod_edge_width 0.1524) + (mod_text_size 1.016 1.016) + (mod_text_width 0.1524) + (pad_size 1.524 1.524) + (pad_drill 0.762) + (pad_to_mask_clearance 0.0508) + (solder_mask_min_width 0.1016) + (pad_to_paste_clearance -0.0762) + (aux_axis_origin 0 0) + (visible_elements FFFEDF7D) + (pcbplotparams + (layerselection 0x310fc_80000001) + (usegerberextensions true) + (usegerberattributes false) + (usegerberadvancedattributes false) + (creategerberjobfile false) + (excludeedgelayer true) + (linewidth 0.100000) + (plotframeref false) + (viasonmask false) + (mode 1) + (useauxorigin false) + (hpglpennumber 1) + (hpglpenspeed 20) + (hpglpendiameter 15.000000) + (psnegative false) + (psa4output false) + (plotreference true) + (plotvalue true) + (plotinvisibletext false) + (padsonsilk false) + (subtractmaskfromsilk false) + (outputformat 1) + (mirror false) + (drillshape 0) + (scaleselection 1) + (outputdirectory "gerbers")) + ) + + (net 0 "") + + (net_class Default "This is the default net class." + (clearance 0.1524) + (trace_width 0.1524) + (via_dia 0.6858) + (via_drill 0.3302) + (uvia_dia 0.6858) + (uvia_drill 0.3302) + ) + + (gr_text "FABRICATION NOTES\n\n1. THIS IS A 2 LAYER BOARD. \n2. EXTERNAL LAYERS SHALL HAVE 1 OZ COPPER.\n3. MATERIAL: FR4 AND 0.062 INCH +/- 10% THICK.\n4. MANUFACTURE IN ACCORDANCE WITH IPC-6012 CLASS 2\n5. ROHS COMPLIANCE IS NOT REQUIRED.\n6. MASK: BOTH SIDES OF THE BOARD SHALL HAVE \n SOLDER MASK (ANY COLOR) OVER BARE COPPER. \n7. SILK: BOTH SIDES OF THE BOARD SHALL HAVE \n WHITE SILKSCREEN. DO NOT PLACE SILK OVER BARE COPPER.\n8. FINISH: HASL/ENIG.\n9. MINIMUM TRACE WIDTH - 0.006 INCH.\n MINIMUM SPACE - 0.006 INCH.\n MINIMUM HOLE DIA - 0.013 INCH. \n10. MAX HOLE PLACEMENT TOLERANCE OF +/- 0.003 INCH.\n11. MAX HOLE DIAMETER TOLERANCE OF +/- 0.003 INCH AFTER PLATING." (at 113.4872 93.2688) (layer Dwgs.User) + (effects (font (size 2.54 2.54) (thickness 0.254)) (justify left)) + ) + +) diff --git a/pcb/discrete/integrated-rf-board/integrated-rf-board.kicad_pcb-bak b/pcb/discrete/integrated-rf-board/integrated-rf-board.kicad_pcb-bak new file mode 100644 index 0000000..79b3eab --- /dev/null +++ b/pcb/discrete/integrated-rf-board/integrated-rf-board.kicad_pcb-bak @@ -0,0 +1,116 @@ +(kicad_pcb (version 20171130) (host pcbnew 5.0.0) + + (general + (thickness 1.6) + (drawings 1) + (tracks 0) + (zones 0) + (modules 0) + (nets 1) + ) + + (page USLetter) + (title_block + (title "Project Title") + ) + + (layers + (0 F.Cu signal) + (31 B.Cu signal) + (34 B.Paste user) + (35 F.Paste user) + (36 B.SilkS user) + (37 F.SilkS user) + (38 B.Mask user) + (39 F.Mask user) + (40 Dwgs.User user) + (44 Edge.Cuts user) + (46 B.CrtYd user) + (47 F.CrtYd user) + (48 B.Fab user) + (49 F.Fab user) + ) + + (setup + (last_trace_width 0.1524) + (user_trace_width 0.1524) + (user_trace_width 0.254) + (user_trace_width 0.3302) + (user_trace_width 0.508) + (user_trace_width 0.762) + (user_trace_width 1.27) + (trace_clearance 0.1524) + (zone_clearance 0.508) + (zone_45_only no) + (trace_min 0.1524) + (segment_width 0.1524) + (edge_width 0.1524) + (via_size 0.6858) + (via_drill 0.3302) + (via_min_size 0.6858) + (via_min_drill 0.3302) + (user_via 0.6858 0.3302) + (user_via 0.762 0.4064) + (user_via 0.8636 0.508) + (uvia_size 0.6858) + (uvia_drill 0.3302) + (uvias_allowed no) + (uvia_min_size 0) + (uvia_min_drill 0) + (pcb_text_width 0.1524) + (pcb_text_size 1.016 1.016) + (mod_edge_width 0.1524) + (mod_text_size 1.016 1.016) + (mod_text_width 0.1524) + (pad_size 1.524 1.524) + (pad_drill 0.762) + (pad_to_mask_clearance 0.0508) + (solder_mask_min_width 0.1016) + (pad_to_paste_clearance -0.0762) + (aux_axis_origin 0 0) + (visible_elements FFFEDF7D) + (pcbplotparams + (layerselection 0x310fc_80000001) + (usegerberextensions true) + (usegerberattributes false) + (usegerberadvancedattributes false) + (creategerberjobfile false) + (excludeedgelayer true) + (linewidth 0.100000) + (plotframeref false) + (viasonmask false) + (mode 1) + (useauxorigin false) + (hpglpennumber 1) + (hpglpenspeed 20) + (hpglpendiameter 15.000000) + (psnegative false) + (psa4output false) + (plotreference true) + (plotvalue true) + (plotinvisibletext false) + (padsonsilk false) + (subtractmaskfromsilk false) + (outputformat 1) + (mirror false) + (drillshape 0) + (scaleselection 1) + (outputdirectory "gerbers")) + ) + + (net 0 "") + + (net_class Default "This is the default net class." + (clearance 0.1524) + (trace_width 0.1524) + (via_dia 0.6858) + (via_drill 0.3302) + (uvia_dia 0.6858) + (uvia_drill 0.3302) + ) + + (gr_text "FABRICATION NOTES\n\n1. THIS IS A 2 LAYER BOARD. \n2. EXTERNAL LAYERS SHALL HAVE 1 OZ COPPER.\n3. MATERIAL: FR4 AND 0.062 INCH +/- 10% THICK.\n4. MANUFACTURE IN ACCORDANCE WITH IPC-6012 CLASS 2\n5. MASK: BOTH SIDES OF THE BOARD SHALL HAVE \n SOLDER MASK (ANY COLOR) OVER BARE COPPER. \n6. SILK: BOTH SIDES OF THE BOARD SHALL HAVE \n WHITE SILKSCREEN. DO NOT PLACE SILK OVER BARE COPPER.\n7. FINISH: HASL/ENIG.\n8. MINIMUM TRACE WIDTH - 0.006 INCH.\n MINIMUM SPACE - 0.006 INCH.\n MINIMUM HOLE DIA - 0.013 INCH. \n10. MAX HOLE PLACEMENT TOLERANCE OF +/- 0.003 INCH.\n11. MAX HOLE DIAMETER TOLERANCE OF +/- 0.003 INCH AFTER PLATING." (at 113.4872 93.2688) (layer Dwgs.User) + (effects (font (size 2.54 2.54) (thickness 0.254)) (justify left)) + ) + +) diff --git a/pcb/discrete/integrated-rf-board/integrated-rf-board.pro b/pcb/discrete/integrated-rf-board/integrated-rf-board.pro new file mode 100644 index 0000000..ff5741b --- /dev/null +++ b/pcb/discrete/integrated-rf-board/integrated-rf-board.pro @@ -0,0 +1,41 @@ +update=Tue 11 Oct 2016 05:25:07 PM PDT +version=1 +last_client=kicad +[cvpcb] +version=1 +NetIExt=net +[pcbnew] +version=1 +PageLayoutDescrFile= +LastNetListRead= +PadDrill=0.600000000000 +PadDrillOvalY=0.600000000000 +PadSizeH=1.500000000000 +PadSizeV=1.500000000000 +PcbTextSizeV=1.016000000000 +PcbTextSizeH=1.016000000000 +PcbTextThickness=0.152400000000 +ModuleTextSizeV=1.016000000000 +ModuleTextSizeH=1.016000000000 +ModuleTextSizeThickness=0.152400000000 +SolderMaskClearance=0.003000000000 +SolderMaskMinWidth=0.004000000000 +DrawSegmentWidth=0.152400000000 +BoardOutlineThickness=0.152400000000 +ModuleOutlineThickness=0.152400000000 +[eeschema] +version=1 +LibDir= +[eeschema/libraries] +[schematic_editor] +version=1 +PageLayoutDescrFile= +PlotDirectoryName= +SubpartIdSeparator=0 +SubpartFirstId=65 +NetFmtName= +SpiceForceRefPrefix=0 +SpiceUseNetNumbers=0 +LabSize=50 +[general] +version=1 diff --git a/pcb/discrete/integrated-rf-board/integrated-rf-board.sch b/pcb/discrete/integrated-rf-board/integrated-rf-board.sch new file mode 100644 index 0000000..5bbaeaf --- /dev/null +++ b/pcb/discrete/integrated-rf-board/integrated-rf-board.sch @@ -0,0 +1,16 @@ +EESchema Schematic File Version 4 +EELAYER 26 0 +EELAYER END +$Descr USLetter 11000 8500 +encoding utf-8 +Sheet 1 1 +Title "" +Date "" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$EndSCHEMATC diff --git a/sim/friis.py b/sim/friis.py new file mode 100644 index 0000000..a40e131 --- /dev/null +++ b/sim/friis.py @@ -0,0 +1,13 @@ +import numpy as np +import matplotlib.pyplot as plt + +g = np.logspace(1, 8, 1000) +g_lna = 10**(16./10.) +f_lna = 10**(3./10.) +f_mixer = 10**(12.8/10.) + +f_tot = f_lna + (f_mixer - 1.)/(g*g_lna) +nf_tot = 10*np.log10(f_tot) + +plt.semilogx(g, nf_tot) +plt.show()