#ifndef INIT_TMC2590_H #define INIT_TMC2590_H #define TMC2590_CLK_US (1) #define TMC2590_CSN_DELAY_US (1) // time after CSN is asserted before SCK can change #define TMC2590_TCC_US (1) // time after CSN is asserted that SCK must be high #define TMC2590_TCH_US (1) // time before CSN is deasserted that SCK must be high #define TMC2590_TCL_US (1) // time after CSN is deasserted that SCK must be high enum tmc2590_reg { DRVCTRL_SDOFF0, DRVCTRL_SDOFF1, CHOPCONF, SMARTEN, SGCSCONF, DRVCONF }; #define DRVCTRL_ADDR (0x00000) #define DRVCTRL_MASK (0xc0000) #define CHOPCONF_ADDR (0x80000) #define CHOPCONF_MASK (0xe0000) #define SMARTEN_ADDR (0xa0000) #define SMARTEN_MASK (0xe0000) #define SGCSCONF_ADDR (0xc0000) #define SGCSCONF_MASK (0xe0000) #define DRVCONF_ADDR (0xe0000) #define DRVCONF_MASK (0xe0000) #define PHA_SIZE (1) #define CA_SIZE (8) #define PHB_SIZE (1) #define CB_SIZE (8) #define PHA_SHIFT (17) #define CA_SHIFT (9) #define PHB_SHIFT (8) #define CB_SHIFT (0) #define INTPOL_SIZE (1) #define DEDGE_SIZE (1) #define MRES_SIZE (4) #define INTPOL_SHIFT (9) #define DEDGE_SHIFT (8) #define MRES_SHIFT (0) #define TBL_SIZE (2) #define CHM_SIZE (1) #define RNDTF_SIZE (1) #define HDEC_SIZE (2) #define HEND_SIZE (4) #define HSTRT_SIZE (3) #define TOFF_SIZE (4) #define TBL_SHIFT (15) #define CHM_SHIFT (14) #define RNDTF_SHIFT (13) #define HDEC_SHIFT (11) #define HEND_SHIFT (7) #define HSTRT_SHIFT (4) #define TOFF_SHIFT (0) #define SEIMIN_SIZE (1) #define SEDN_SIZE (2) #define SEMAX_SIZE (4) #define SEUP_SIZE (2) #define SEMIN_SIZE (4) #define SEIMIN_SHIFT (15) #define SEDN_SHIFT (13) #define SEMAX_SHIFT (8) #define SEUP_SHIFT (5) #define SEMIN_SHIFT (0) #define SFILT_SIZE (1) #define SGT_SIZE (7) #define CS_SIZE (5) #define SFILT_SHIFT (16) #define SGT_SHIFT (8) #define CS_SHIFT (0) #define TST_SIZE (1) #define SLPH_SIZE (2) #define SLPL_SIZE (2) #define SLP2_SIZE (1) #define DIS_S2G_SIZE (1) #define TS2G_SIZE (2) #define SDOFF_SIZE (1) #define VSENSE_SIZE (1) #define RDSEL_SIZE (2) #define OTSENS_SIZE (1) #define SHRTSENS_SIZE (1) #define EN_PFD_SIZE (1) #define EN_S2VS_SIZE (1) #define TST_SHIFT (16) #define SLPH_SHIFT (14) #define SLPL_SHIFT (12) #define SLP2_SHIFT (11) #define DIS_S2G_SHIFT (10) #define TS2G_SHIFT (8) #define SDOFF_SHIFT (7) #define VSENSE_SHIFT (6) #define RDSEL_SHIFT (4) #define OTSENS_SHIFT (3) #define SHRTSENS_SHIFT (2) #define EN_PFD_SHIFT (1) #define EN_S2VS_SHIFT (0) #define BIT_VAL(x, v) ((x & ((1 << v##SIZE) - 1)) << v##SHIFT) #define PHA(x) BIT_VAL(x, PHA_) #define CA(x) BIT_VAL(x, CA_) #define PHB(x) BIT_VAL(x, PHB_) #define CB(x) BIT_VAL(x, CB_) #define INTPOL(x) BIT_VAL(x, INTPOL_) #define DEDGE(x) BIT_VAL(x, DEDGE_) #define MRES(x) BIT_VAL(x, MRES_) #define TBL(x) BIT_VAL(x, TBL_) #define CHM(x) BIT_VAL(x, CHM_) #define RNDTF(x) BIT_VAL(x, RNDTF_) #define HDEC(x) BIT_VAL(x, HDEC_) #define HEND(x) BIT_VAL(x, HEND_) #define HSTRT(x) BIT_VAL(x, HSTRT_) #define TOFF(x) BIT_VAL(x, TOFF_) #define SEIMEN(x) BIT_VAL(x, SEIMEN_) #define SEDN(x) BIT_VAL(x, SEDN_) #define SEMAX(x) BIT_VAL(x, SEMAX_) #define SEUP(x) BIT_VAL(x, SEUP_) #define SEMIN(x) BIT_VAL(x, SEMIN_) #define SFILT(x) BIT_VAL(x, SFILT_) #define SGT(x) BIT_VAL(x, SGT_) #define CS(x) BIT_VAL(x, CS_) #define TST(x) BIT_VAL(x, TST_) #define SLPH(x) BIT_VAL(x, SLPH_) #define SLPL(x) BIT_VAL(x, SLPL_) #define SLP2(x) BIT_VAL(x, SLP2_) #define DIS_S2G(x) BIT_VAL(x, DIS_S2G_) #define TS2G(x) BIT_VAL(x, TS2G_) #define SDOFF(x) BIT_VAL(x, SDOFF_) #define VSENSE(x) BIT_VAL(x, VSENSE_) #define RDSEL(x) BIT_VAL(x, RDSEL_) #define OTSENS(x) BIT_VAL(x, OTSENS_) #define SHRTSENS(x) BIT_VAL(x, SHRTSENS_) #define EN_PFD(x) BIT_VAL(x, EN_PFD_) #define EN_S2VS(x) BIT_VAL(x, EN_S2VS_) #endif