From 05b29a54d10bf158b9cb19bda18ab841f03fbeaf Mon Sep 17 00:00:00 2001 From: Kelvin Ly Date: Wed, 8 Sep 2021 21:52:25 -0400 Subject: [PATCH] Modifications so it'll work with my cnc controller --- grblHAL_Teensy4/src/init_tmc2590.c | 130 +++++++++++++++++++++ grblHAL_Teensy4/src/init_tmc2590.h | 162 +++++++++++++++++++++++++++ grblHAL_Teensy4/src/my_machine.h | 8 +- grblHAL_Teensy4/src/my_machine_map.h | 65 +++++++++++ 4 files changed, 361 insertions(+), 4 deletions(-) create mode 100644 grblHAL_Teensy4/src/init_tmc2590.c create mode 100644 grblHAL_Teensy4/src/init_tmc2590.h create mode 100644 grblHAL_Teensy4/src/my_machine_map.h diff --git a/grblHAL_Teensy4/src/init_tmc2590.c b/grblHAL_Teensy4/src/init_tmc2590.c new file mode 100644 index 0000000..b10f8e1 --- /dev/null +++ b/grblHAL_Teensy4/src/init_tmc2590.c @@ -0,0 +1,130 @@ +#include "init_tmc2590.h" + +#include "grbl/hal.h" + +#define TMC_SCK_PIN (27) +#define TMC_CSN_PIN (28) +#define TMC_SDI_PIN (26) + +// initialize the 3 TMC2590 stepper motor controllers +// bit bang 60 bit sequences to transmit settings to all three +// of them + +#define REPEAT3(x) { (x), (x), (x) } +// TODO probably store this in settings somehow +const static struct tmc2590_config { + enum tmc2590_reg reg; + uint32_t val[3]; // value for each axis +} tmc_config[] = { + // blank time 24 cycles, chopper enabled, fixed toff, hysteresis dec 16 cycles, + // no hysteresis offset, hysteresis start offset 3, off time 120 cycles + { CHOPCONF, REPEAT3(TBL(1)|HEND(3)|HSTRT(3)|TOFF(4)) }, + // stallguard2 enabled, stallguard threshold 0, current scale 21 + { SGCSCONF, REPEAT3(SFILT(1)|CS(21)) }, // should give a peak current of 1.6 A + // medium gate drive for both high and low side, + // short to ground detection enabled + // step/dir interface enabled + // current sense resistor max voltage set to 173mV, + // motor dampening enabled + // Vs fault detection enabled + { DRVCONF, REPEAT3(SLPH(3)|SLPL(3)|SLP2(0)|VSENSE(1)|EN_PFD(1)|EN_S2VS(1)) }, + // no step interpolation + // rising edge only + // 1/64 microstepping + { DRVCTRL_SDOFF0, REPEAT3(MRES(2)) } +}; + +static uint32_t tmc2590_mask_addr(uint32_t v, enum tmc2590_reg reg) { + uint32_t ret = v; + switch (reg) { + case DRVCTRL_SDOFF0: + case DRVCTRL_SDOFF1: + ret &= ~DRVCTRL_MASK; + ret |= DRVCTRL_ADDR; + break; + case CHOPCONF: + ret &= ~CHOPCONF_MASK; + ret |= CHOPCONF_ADDR; + break; + case SMARTEN: + ret &= ~SMARTEN_MASK; + ret |= SMARTEN_ADDR; + break; + case SGCSCONF: + ret &= ~SGCSCONF_MASK; + ret |= SGCSCONF_ADDR; + break; + case DRVCONF: + ret &= ~DRVCONF_MASK; + ret |= DRVCONF_ADDR; + break; + } + return ret; +} + +static void tmc2590_csn_enable(void) { + digitalWrite(TMC_SCK_PIN, HIGH); + delayMicroseconds(TMC2590_TCC_US); + + digitalWrite(TMC_CSN_PIN, LOW); + delayMicroseconds(TMC2590_CSN_DELAY_US); +} + +static void tmc2590_csn_disable(void) { + digitalWrite(TMC_SCK_PIN, HIGH); + delayMicroseconds(TMC2590_TCH_US); + + digitalWrite(TMC_CSN_PIN, HIGH); + delayMicroseconds(TMC2590_TCL_US); +} + +static void tmc2590_send_bit(uint32_t bit) { + digitalWrite(TMC_SCK_PIN, LOW); + if (bit) { + digitalWrite(TMC_SDI_PIN, HIGH); + } else { + digitalWrite(TMC_SDI_PIN, LOW); + } + delayMicroseconds(TMC2590_CLK_US); + digitalWrite(TMC_SCK_PIN, HIGH); + delayMicroseconds(TMC2590_CLK_US); +} + +static void tmc2590_write_reg(const struct tmc2590_config* cfg) { + uint32_t cur_reg; + tmc2590_csn_enable(); + for (int i = 0; i < 3; i++) { + cur_reg = cfg->val[i]; + cur_reg = tmc2590_mask_addr(cur_reg, cfg->reg); + for (int j = 19; j >= 0; j--) { + tmc2590_send_bit(cur_reg & (1 << j)); + } + } + tmc2590_csn_disable(); +} + +static void tmc2590_init(void) { + pinMode(TMC_SCK_PIN, OUTPUT); + pinMode(TMC_SDI_PIN, OUTPUT); + pinMode(TMC_CSN_PIN, OUTPUT); + + for (int i = 0; i < sizeof(tmc_config)/sizeof(tmc_config[0]); i++) { + tmc2590_write_reg(&tmc_config[i]); + } +} + +static driver_reset_ptr on_reset; + +static void tmc2590_on_reset(void) { + tmc2590_init(); + on_reset(); +} + +void my_plugin(void) { + // TODO add message + tmc2590_init(); + + // hook into soft reset + on_reset = hal.driver_reset; + hal.driver_reset = tmc2590_on_reset; +} diff --git a/grblHAL_Teensy4/src/init_tmc2590.h b/grblHAL_Teensy4/src/init_tmc2590.h new file mode 100644 index 0000000..e371f7e --- /dev/null +++ b/grblHAL_Teensy4/src/init_tmc2590.h @@ -0,0 +1,162 @@ +#ifndef INIT_TMC2590_H +#define INIT_TMC2590_H + +#define TMC2590_CLK_US (1) +#define TMC2590_CSN_DELAY_US (1) // time after CSN is asserted before SCK can change + +#define TMC2590_TCC_US (1) // time after CSN is asserted that SCK must be high +#define TMC2590_TCH_US (1) // time before CSN is deasserted that SCK must be high +#define TMC2590_TCL_US (1) // time after CSN is deasserted that SCK must be high + +enum tmc2590_reg { + DRVCTRL_SDOFF0, + DRVCTRL_SDOFF1, + CHOPCONF, + SMARTEN, + SGCSCONF, + DRVCONF +}; + +#define DRVCTRL_ADDR (0x00000) +#define DRVCTRL_MASK (0xc0000) +#define CHOPCONF_ADDR (0x80000) +#define CHOPCONF_MASK (0xe0000) +#define SMARTEN_ADDR (0xa0000) +#define SMARTEN_MASK (0xe0000) +#define SGCSCONF_ADDR (0xc0000) +#define SGCSCONF_MASK (0xe0000) +#define DRVCONF_ADDR (0xe0000) +#define DRVCONF_MASK (0xe0000) + +#define PHA_SIZE (1) +#define CA_SIZE (8) +#define PHB_SIZE (1) +#define CB_SIZE (8) + +#define PHA_SHIFT (17) +#define CA_SHIFT (9) +#define PHB_SHIFT (8) +#define CB_SHIFT (0) + + +#define INTPOL_SIZE (1) +#define DEDGE_SIZE (1) +#define MRES_SIZE (4) + +#define INTPOL_SHIFT (9) +#define DEDGE_SHIFT (8) +#define MRES_SHIFT (0) + + +#define TBL_SIZE (2) +#define CHM_SIZE (1) +#define RNDTF_SIZE (1) +#define HDEC_SIZE (2) +#define HEND_SIZE (4) +#define HSTRT_SIZE (3) +#define TOFF_SIZE (4) + +#define TBL_SHIFT (15) +#define CHM_SHIFT (14) +#define RNDTF_SHIFT (13) +#define HDEC_SHIFT (11) +#define HEND_SHIFT (7) +#define HSTRT_SHIFT (4) +#define TOFF_SHIFT (0) + + +#define SEIMIN_SIZE (1) +#define SEDN_SIZE (2) +#define SEMAX_SIZE (4) +#define SEUP_SIZE (2) +#define SEMIN_SIZE (4) + +#define SEIMIN_SHIFT (15) +#define SEDN_SHIFT (2) +#define SEMAX_SHIFT (8) +#define SEUP_SHIFT (5) +#define SEMIN_SHIFT (0) + + +#define SFILT_SIZE (1) +#define SGT_SIZE (7) +#define CS_SIZE (5) + +#define SFILT_SHIFT (16) +#define SGT_SHIFT (8) +#define CS_SHIFT (0) + +#define TST_SIZE (1) +#define SLPH_SIZE (2) +#define SLPL_SIZE (2) +#define SLP2_SIZE (1) +#define DIS_S2G_SIZE (1) +#define TS2G_SIZE (2) +#define SDOFF_SIZE (1) +#define VSENSE_SIZE (1) +#define RDSEL_SIZE (2) +#define OTSENS_SIZE (1) +#define SHRTSENS_SIZE (1) +#define EN_PFD_SIZE (1) +#define EN_S2VS_SIZE (1) + + +#define TST_SHIFT (16) +#define SLPH_SHIFT (14) +#define SLPL_SHIFT (12) +#define SLP2_SHIFT (11) +#define DIS_S2G_SHIFT (10) +#define TS2G_SHIFT (8) +#define SDOFF_SHIFT (7) +#define VSENSE_SHIFT (6) +#define RDSEL_SHIFT (4) +#define OTSENS_SHIFT (3) +#define SHRTSENS_SHIFT (2) +#define EN_PFD_SHIFT (1) +#define EN_S2VS_SHIFT (0) + +#define BIT_VAL(x, v) ((x & ((1 << v##SIZE) - 1)) << v##SHIFT) + +#define PHA(x) BIT_VAL(x, PHA_) +#define CA(x) BIT_VAL(x, CA_) +#define PHB(x) BIT_VAL(x, PHB_) +#define CB(x) BIT_VAL(x, CB_) + +#define INTPOL(x) BIT_VAL(x, INTPOL_) +#define DEDGE(x) BIT_VAL(x, DEDGE_) +#define MRES(x) BIT_VAL(x, MRES_) + +#define TBL(x) BIT_VAL(x, TBL_) +#define CHM(x) BIT_VAL(x, CHM_) +#define RNDTF(x) BIT_VAL(x, RNDTF_) +#define HDEC(x) BIT_VAL(x, HDEC_) +#define HEND(x) BIT_VAL(x, HEND_) +#define HSTRT(x) BIT_VAL(x, HSTRT_) +#define TOFF(x) BIT_VAL(x, TOFF_) + +#define SEIMEN(x) BIT_VAL(x, SEIMEN_) +#define SEDN(x) BIT_VAL(x, SEDN_) +#define SEMAX(x) BIT_VAL(x, SEMAX_) +#define SEUP(x) BIT_VAL(x, SEUP_) +#define SEMIN(x) BIT_VAL(x, SEMIN_) + +#define SFILT(x) BIT_VAL(x, SFILT_) +#define SGT(x) BIT_VAL(x, SGT_) +#define CS(x) BIT_VAL(x, CS_) + +#define TST(x) BIT_VAL(x, TST_) +#define SLPH(x) BIT_VAL(x, SLPH_) +#define SLPL(x) BIT_VAL(x, SLPL_) +#define SLP2(x) BIT_VAL(x, SLP2_) +#define DIS_S2G(x) BIT_VAL(x, DIS_S2G_) +#define TS2G(x) BIT_VAL(x, TS2G_) +#define SDOFF(x) BIT_VAL(x, SDOFF_) +#define VSENSE(x) BIT_VAL(x, VSENSE_) +#define RDSEL(x) BIT_VAL(x, RDSEL_) +#define OTSENS(x) BIT_VAL(x, OTSENS_) +#define SHRTSENS(x) BIT_VAL(x, SHRTSENS_) +#define EN_PFD(x) BIT_VAL(x, EN_PFD_) +#define EN_S2VS(x) BIT_VAL(x, EN_S2VS_) + + +#endif diff --git a/grblHAL_Teensy4/src/my_machine.h b/grblHAL_Teensy4/src/my_machine.h index ee9a002..307c7d0 100644 --- a/grblHAL_Teensy4/src/my_machine.h +++ b/grblHAL_Teensy4/src/my_machine.h @@ -24,11 +24,11 @@ // NOTE: Only one board may be enabled! // If none is enabled pin mappings from generic_map.h will be used //#define BOARD_T40X101 -#define BOARD_T41U5XBB +//#define BOARD_T41U5XBB //#define BOARD_T41U5XBB_SS // For a modified T41U5XBB board, allows spindle sync to be enabled. //#define BOARD_T41BB5X_PRO //#define BOARD_CNC_BOOSTERPACK -//#define BOARD_MY_MACHINE // Add my_machine_map.h before enabling this! +#define BOARD_MY_MACHINE // Add my_machine_map.h before enabling this! // Configuration // Uncomment to enable, for some a value > 1 may be assigned, if so the default value is shown. @@ -49,7 +49,7 @@ N_AXIS has a default value of 3, edit grbl\config.h to increase. */ -#define USB_SERIAL_CDC 2 // 1 for Arduino class library and 2 for PJRC C library. Comment out to use UART communication. +#define USB_SERIAL_CDC 1 // 1 for Arduino class library and 2 for PJRC C library. Comment out to use UART communication. //#define USB_SERIAL_WAIT 1 // Wait for USB connection before starting grblHAL. //#define BLUETOOTH_ENABLE 1 // Set to 1 for HC-05 module. Requires Bluetooth plugin. //#define SPINDLE_HUANYANG 1 // Set to 1 or 2 for Huanyang VFD spindle. Requires spindle plugin. @@ -63,7 +63,7 @@ N_AXIS has a default value of 3, edit grbl\config.h to increase. //#define ODOMETER_ENABLE 1 // Odometer plugin. //#define OPENPNP_ENABLE 1 // OpenPNP plugin. To be completed. //#define FANS_ENABLE 1 // Enable fan control via M106/M107. Requires fans plugin. -//#define EEPROM_ENABLE 1 // I2C EEPROM support. Set to 1 for 24LC16(2K), 2 for larger sizes. Requires eeprom plugin. +#define EEPROM_ENABLE 1 // I2C EEPROM support. Set to 1 for 24LC16(2K), 2 for larger sizes. Requires eeprom plugin. //#define EEPROM_IS_FRAM 1 // Uncomment when EEPROM is enabled and chip is FRAM, this to remove write delay. //#define SPINDLE_SYNC_ENABLE 1 // Enable spindle sync support (G33, G76). !! NOTE: Alpha quality - enable only for test or verification. // Currently only available for BOARD_T41BB5X_PRO and BOARD_T41U5XBB_SS. diff --git a/grblHAL_Teensy4/src/my_machine_map.h b/grblHAL_Teensy4/src/my_machine_map.h new file mode 100644 index 0000000..dae9e3f --- /dev/null +++ b/grblHAL_Teensy4/src/my_machine_map.h @@ -0,0 +1,65 @@ +#if N_ABC_MOTORS > 0 +#error "Axis configuration is not supported!" +#endif + +#define BOARD_NAME "my CNC board" +//#define HAS_IOPORTS + +#if N_AXIS > 3 +#error Max number of axes is 3 for my board +#endif + +#if SPINDLE_SYNC_ENABLE +#error spindle sync not supported +#endif + + +// Define step pulse output pins. +#define X_STEP_PIN (2u) +#define Y_STEP_PIN (4u) +#define Z_STEP_PIN (6u) + +// Define step direction output pins. +#define X_DIRECTION_PIN (3u) +#define Y_DIRECTION_PIN (5u) +#define Z_DIRECTION_PIN (7u) + +// Define stepper driver enable/disable output pin(s). +#define STEPPERS_ENABLE_PIN (10u) + +// Define homing/hard limit switch input pins. +#define X_LIMIT_PIN (20u) +#define Y_LIMIT_PIN (21u) +#define Z_LIMIT_PIN (22u) + +// Define spindle enable and spindle direction output pins. +#define SPINDLE_ENABLE_PIN (12u) +#define SPINDLE_DIRECTION_PIN (11u) +#define SPINDLEPWMPIN (13u) // NOTE: only pin 12 or pin 13 can be assigned! + +// Define flood and mist coolant enable output pins. +#define COOLANT_FLOOD_PIN (19u) +#define COOLANT_MIST_PIN (18u) + +// Define user-control CONTROLs (cycle start, reset, feed hold, door) input pins. +#define RESET_PIN (14u) +#define FEED_HOLD_PIN (16u) +#define CYCLE_START_PIN (17u) +#define SAFETY_DOOR_PIN (29u) + +// Define probe switch input pin. +#define PROBE_PIN (15U) + +#if EEPROM_ENABLE || KEYPAD_ENABLE +#define I2C_PORT 4 +#define I2C_SCL4 (24u) // Not referenced, for info only +#define I2C_SDA4 (25u) // Not referenced, for info only +#endif + +#if QEI_ENABLE +#define QEI_A_PIN (0) +#define QEI_B_PIN (3) +// #define QEI_INDEX_PIN GPIO2_PIN +#define QEI_SELECT_PIN (1) +#endif +