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bldc-driver
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base: kelvin:2b56926951998fd28dcd5dce04ea44fcc5efa4a0
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kelvin:master
kelvin:rev2
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compare: kelvin:6b8dc6f3371e6eb60fd8a14f6ffe3eb77d9fee4e
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kelvin:rev2
kelvin:master

No commits in common. "2b56926951998fd28dcd5dce04ea44fcc5efa4a0" and "6b8dc6f3371e6eb60fd8a14f6ffe3eb77d9fee4e" have entirely different histories.
2b56926951 ... 6b8dc6f337

13 changed files with 1445 additions and 1364 deletions
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901
pcb/bldc-controller.kicad_pcb
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File diff suppressed because it is too large Load Diff

978
pcb/bldc-controller.kicad_pcb-bak
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File diff suppressed because it is too large Load Diff

50
pcb/bldc-controller.sch
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@ -1726,13 +1726,13 @@ F 3 "" H 8950 9850 50 0001 C CNN
$EndComp
Wire Wire Line
8950 9850 8950 9750
Text Label 12450 5650 2 50 ~ 0
Text Label 12450 5750 2 50 ~ 0
FLASH_SO
Text Label 10550 5950 0 50 ~ 0
FLASH_SCK
Text Label 10550 5750 0 50 ~ 0
FLASH_SS
Text Label 12450 5750 2 50 ~ 0
Text Label 12450 5650 2 50 ~ 0
FLASH_SI
Wire Wire Line
12450 5750 12000 5750
@ -3941,17 +3941,55 @@ Wire Wire Line
3050 9500 3050 9400
Wire Wire Line
3050 9400 3950 9400
$Comp
L Mechanical:MountingHole H3
U 1 1 5E00E72A
P 4050 8650
F 0 "H3" H 4050 8850 50 0000 C CNN
F 1 "MountingHole" H 4050 8775 50 0000 C CNN
F 2 "bldc-parts:stencil_alignment_pin" H 4050 8650 50 0001 C CNN
F 3 "~" H 4050 8650 50 0001 C CNN
F 4 "NoPart" H 4050 8650 50 0001 C CNN "Mouser"
1 4050 8650
1 0 0 -1
$EndComp
$Comp
L Mechanical:MountingHole H4
U 1 1 5E00EA64
P 4600 8650
F 0 "H4" H 4600 8850 50 0000 C CNN
F 1 "MountingHole" H 4600 8775 50 0000 C CNN
F 2 "bldc-parts:stencil_alignment_pin" H 4600 8650 50 0001 C CNN
F 3 "~" H 4600 8650 50 0001 C CNN
F 4 "NoPart" H 4600 8650 50 0001 C CNN "Mouser"
1 4600 8650
1 0 0 -1
$EndComp
$Comp
L Mechanical:MountingHole H5
U 1 1 5E00EE37
P 5100 8650
F 0 "H5" H 5100 8850 50 0000 C CNN
F 1 "MountingHole" H 5100 8775 50 0000 C CNN
F 2 "bldc-parts:stencil_alignment_pin" H 5100 8650 50 0001 C CNN
F 3 "~" H 5100 8650 50 0001 C CNN
F 4 "NoPart" H 5100 8650 50 0001 C CNN "Mouser"
1 5100 8650
1 0 0 -1
$EndComp
Text Notes 8450 2600 0 50 ~ 0
TODO fix C30's part number,\n isn't rated for 25V
Text Notes 2500 7400 0 50 ~ 0
TODO fix silkscreen position of C6 and C8
Text Notes 11800 6450 0 50 ~ 0
TODO fix routing; SI and SO are backwards\nFLASH_SI = DO\nFLASH_SO = DI
Text Notes 8150 2900 0 50 ~ 0
TODO maybe hook up the buck\nregulator output to VM to save on power dissipation
$Comp
L power:GND #PWR0117
L power:GND #PWR?
U 1 1 5E1D5A9A
P 9450 2650
F 0 "#PWR0117" H 9450 2400 50 0001 C CNN
F 0 "#PWR?" H 9450 2400 50 0001 C CNN
F 1 "GND" H 9450 2500 50 0000 C CNN
F 2 "" H 9450 2650 50 0001 C CNN
F 3 "" H 9450 2650 50 0001 C CNN
@ -3961,10 +3999,10 @@ $EndComp
Wire Wire Line
9450 2650 9650 2650
$Comp
L power:GND #PWR0118
L power:GND #PWR?
U 1 1 5E26E530
P 9450 3550
F 0 "#PWR0118" H 9450 3300 50 0001 C CNN
F 0 "#PWR?" H 9450 3300 50 0001 C CNN
F 1 "GND" H 9450 3400 50 0000 C CNN
F 2 "" H 9450 3550 50 0001 C CNN
F 3 "" H 9450 3550 50 0001 C CNN

16
pcb/bldc-controller.sch-bak
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@ -1726,13 +1726,13 @@ F 3 "" H 8950 9850 50 0001 C CNN
$EndComp
Wire Wire Line
8950 9850 8950 9750
Text Label 12450 5650 2 50 ~ 0
Text Label 12450 5750 2 50 ~ 0
FLASH_SO
Text Label 10550 5950 0 50 ~ 0
FLASH_SCK
Text Label 10550 5750 0 50 ~ 0
FLASH_SS
Text Label 12450 5750 2 50 ~ 0
Text Label 12450 5650 2 50 ~ 0
FLASH_SI
Wire Wire Line
12450 5750 12000 5750
@ -3981,13 +3981,17 @@ Text Notes 8450 2600 0 50 ~ 0
TODO fix C30's part number,\n isn't rated for 25V
Text Notes 2500 7400 0 50 ~ 0
TODO fix silkscreen position of C6 and C8
Text Notes 11800 6450 0 50 ~ 0
TODO fix routing; SI and SO are backwards\nFLASH_SI = DO\nFLASH_SO = DI
Text Notes 8150 2900 0 50 ~ 0
TODO maybe hook up the buck\nregulator output to VM to save on power dissipation
Text Notes 8000 4550 0 50 ~ 0
TODO SPB,SNB,SPC,SNC need to be wired to stuff\nSNx = ground, SPx = positive side of the sense resistor
$Comp
L power:GND #PWR0117
L power:GND #PWR?
U 1 1 5E1D5A9A
P 9450 2650
F 0 "#PWR0117" H 9450 2400 50 0001 C CNN
F 0 "#PWR?" H 9450 2400 50 0001 C CNN
F 1 "GND" H 9450 2500 50 0000 C CNN
F 2 "" H 9450 2650 50 0001 C CNN
F 3 "" H 9450 2650 50 0001 C CNN
@ -3997,10 +4001,10 @@ $EndComp
Wire Wire Line
9450 2650 9650 2650
$Comp
L power:GND #PWR0118
L power:GND #PWR?
U 1 1 5E26E530
P 9450 3550
F 0 "#PWR0118" H 9450 3300 50 0001 C CNN
F 0 "#PWR?" H 9450 3300 50 0001 C CNN
F 1 "GND" H 9450 3400 50 0000 C CNN
F 2 "" H 9450 3550 50 0001 C CNN
F 3 "" H 9450 3550 50 0001 C CNN

2
rtl/.gitignore vendored
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@ -2,4 +2,4 @@
*.bin
*.json
*.rpt
*.log*
*.log

2
rtl/Makefile
View File

@ -13,7 +13,7 @@ ${FN}.json: ${FN}.v $(shell find library -type f -name '*.v')
./run_yosys.sh ${FN} | tee bldc.log
${FN}.asc: ${FN}.json ${FN}.pcf
nextpnr-ice40 ${NEXTPNR_OPTS} --pcf "${FN}.pcf" --json "${FN}.json" --asc "${FN}.asc" --freq 25 | tee bldc.log_pnr
nextpnr-ice40 ${NEXTPNR_OPTS} --pcf "${FN}.pcf" --json "${FN}.json" --asc "${FN}.asc"
${FN}.rpt: ${FN}.pcf ${FN}.asc
icetime ${ICETIME_OPTS} -p "${FN}.pcf" -mtr "${FN}.rpt" "${FN}.asc"

8
rtl/bldc.pcf
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@ -6,12 +6,4 @@ set_io adc_ss 27
set_io adc_si 26
set_io adc_so 25
set_io drv_fault_n 36
set_io drv_en 43
set_io drv_cs_n 44
set_io drv_sck 45
set_io drv_sdi 46
set_io drv_sdo 47
set_io clk 20

44
rtl/bldc.v
View File

@ -6,16 +6,8 @@ module bldc (
output adc_ss,
output adc_sck,
input adc_so,
output adc_si,
input drv_fault_n,
output drv_en,
output drv_cs_n,
output drv_sck,
output drv_sdi,
input drv_sdo
);
output adc_si
);
reg [7:0] dbg_buf = 0;
reg dbg_buf_vld = 0;
@ -35,15 +27,6 @@ wire [11:0] adc_val;
wire adc_vld;
reg adc_ack = 0;
reg stop = 0;
reg coast_nbrake = 0;
reg clear_fault = 0;
wire drv_rdy;
wire fault_a;
wire fault_b;
wire fault_c;
adc_driver adc0(
.clk(clk),
.rst(1'b0),
@ -58,29 +41,6 @@ adc_driver adc0(
.ack(adc_ack)
);
drv8353r_driver driver0(
.clk(clk),
.rst(1'b0),
.en(1'b1),
.drv_fault_n(drv_fault_n),
.drv_en(drv_en),
.drv_cs_n(drv_cs_n),
.drv_sck(drv_sck),
.drv_sdi(drv_sdi),
.drv_sdo(drv_sdo),
.stop(stop),
.coast_nbrake(coast_nbrake),
.clear_fault(clear_fault),
.rdy(drv_rdy),
.fault_a(fault_a),
.fault_b(fault_b),
.fault_c(fault_c)
);
uart_tx_115200 dbg(
.clk_25mhz(clk),
.rst(1'b0),

8
rtl/library/drv8353r_driver.v
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@ -138,14 +138,6 @@ assign cur_bit = 15 - count[6:3];
reg [2:0] cur_reg = 0;
reg [2:0] cur_reg_next;
reg fault_a_ff = 0;
reg fault_b_ff = 0;
reg fault_c_ff = 0;
assign fault_a = fault_a_ff;
assign fault_b = fault_b_ff;
assign fault_c = fault_c_ff;
always @* begin
state_next = state;